| /external/llvm/lib/Target/NVPTX/ |
| NVPTXRegisterInfo.cpp | 92 int SPAdj, unsigned FIOperandNum,
97 int FrameIndex = MI.getOperand(FIOperandNum).getIndex();
101 MI.getOperand(FIOperandNum + 1).getImm();
104 MI.getOperand(FIOperandNum).ChangeToRegister(NVPTX::VRFrame, false);
105 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
|
| NVPTXRegisterInfo.h | 43 unsigned FIOperandNum,
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZRegisterInfo.cpp | 59 int SPAdj, unsigned FIOperandNum,
71 int FrameIndex = MI->getOperand(FIOperandNum).getIndex();
74 MI->getOperand(FIOperandNum + 1).getImm());
78 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, /*isDef*/ false);
79 MI->getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
88 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
106 && MI->getOperand(FIOperandNum + 2).getReg() == 0) {
110 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
111 MI->getOperand(FIOperandNum + 2).ChangeToRegister(ScratchReg,
128 MI->getOperand(FIOperandNum).ChangeToRegister(ScratchReg
[all...] |
| SystemZRegisterInfo.h | 51 int SPAdj, unsigned FIOperandNum,
|
| /external/llvm/lib/Target/BPF/ |
| BPFRegisterInfo.h | 33 unsigned FIOperandNum,
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430RegisterInfo.h | 37 int SPAdj, unsigned FIOperandNum,
|
| MSP430RegisterInfo.cpp | 105 int SPAdj, unsigned FIOperandNum,
114 int FrameIndex = MI.getOperand(FIOperandNum).getIndex();
128 Offset += MI.getOperand(FIOperandNum + 1).getImm();
137 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
154 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
155 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
|
| /external/llvm/lib/Target/Sparc/ |
| SparcRegisterInfo.cpp | 112 unsigned FIOperandNum, int Offset,
119 MI.getOperand(FIOperandNum).ChangeToRegister(FramePtr, false);
120 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
141 MI.getOperand(FIOperandNum).ChangeToRegister(SP::G1, false);
142 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(LO10(Offset));
159 MI.getOperand(FIOperandNum).ChangeToRegister(SP::G1, false);
160 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(0);
166 int SPAdj, unsigned FIOperandNum,
172 int FrameIndex = MI.getOperand(FIOperandNum).getIndex();
181 Offset += MI.getOperand(FIOperandNum + 1).getImm()
[all...] |
| SparcRegisterInfo.h | 39 int SPAdj, unsigned FIOperandNum,
|
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPURegisterInfo.h | 50 unsigned FIOperandNum,
|
| AMDGPURegisterInfo.cpp | 36 unsigned FIOperandNum,
|
| SIRegisterInfo.h | 50 unsigned FIOperandNum,
|
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyRegisterInfo.h | 39 unsigned FIOperandNum,
|
| WebAssemblyRegisterInfo.cpp | 56 unsigned FIOperandNum, RegScavenger * /*RS*/) const {
62 int FrameIndex = MI.getOperand(FIOperandNum).getIndex();
84 MI.getOperand(FIOperandNum).ChangeToRegister(OffsetReg, /*IsDef=*/false);
|
| /external/llvm/lib/Target/XCore/ |
| XCoreRegisterInfo.h | 43 int SPAdj, unsigned FIOperandNum,
|
| XCoreRegisterInfo.cpp | 262 int SPAdj, unsigned FIOperandNum,
266 MachineOperand &FrameOp = MI.getOperand(FIOperandNum);
293 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false /*isDef*/);
294 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
299 Offset += MI.getOperand(FIOperandNum + 1).getImm();
300 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(0);
|
| /external/llvm/lib/Target/ARM/ |
| ThumbRegisterInfo.h | 60 int SPAdj, unsigned FIOperandNum,
|
| ThumbRegisterInfo.cpp | 498 int SPAdj, unsigned FIOperandNum,
505 return ARMBaseRegisterInfo::eliminateFrameIndex(II, SPAdj, FIOperandNum,
515 int FrameIndex = MI.getOperand(FIOperandNum).getIndex();
547 MI.getOperand(FIOperandNum). ChangeToRegister(FrameReg, false /*isDef*/);
548 MI.getOperand(FIOperandNum+1).ChangeToImmediate(Offset);
555 if (rewriteFrameIndex(MI, FIOperandNum, FrameReg, Offset, TII))
588 MI.getOperand(FIOperandNum).ChangeToRegister(TmpReg, false, false, true);
592 MI.getOperand(FIOperandNum+1).ChangeToRegister(FrameReg, false, false,
610 MI.getOperand(FIOperandNum).ChangeToRegister(VReg, false, false, true);
614 MI.getOperand(FIOperandNum+1).ChangeToRegister(FrameReg, false, false
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonRegisterInfo.h | 52 unsigned FIOperandNum, RegScavenger *RS = nullptr) const override;
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64RegisterInfo.cpp | 356 int SPAdj, unsigned FIOperandNum,
367 int FrameIndex = MI.getOperand(FIOperandNum).getIndex();
376 Offset += MI.getOperand(FIOperandNum + 1).getImm();
377 MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false /*isDef*/);
378 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
384 if (rewriteAArch64FrameIndex(MI, FIOperandNum, FrameReg, Offset, TII))
396 MI.getOperand(FIOperandNum).ChangeToRegister(ScratchReg, false, false, true);
|
| AArch64RegisterInfo.h | 85 unsigned FIOperandNum,
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCRegisterInfo.cpp | 733 // Return the OffsetOperandNo given the FIOperandNum (and the instruction).
735 unsigned FIOperandNum) {
737 unsigned OffsetOperandNo = (FIOperandNum == 2) ? 1 : 2;
739 OffsetOperandNo = FIOperandNum - 1;
742 OffsetOperandNo = FIOperandNum + 1;
749 int SPAdj, unsigned FIOperandNum,
766 unsigned OffsetOperandNo = getOffsetONFromFION(MI, FIOperandNum);
769 int FrameIndex = MI.getOperand(FIOperandNum).getIndex();
812 MI.getOperand(FIOperandNum).ChangeToRegister(
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsRegisterInfo.h | 57 int SPAdj, unsigned FIOperandNum,
|
| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.h | 126 int SPAdj, unsigned FIOperandNum,
|
| X86RegisterInfo.cpp | 538 int SPAdj, unsigned FIOperandNum,
543 int FrameIndex = MI.getOperand(FIOperandNum).getIndex();
566 MachineOperand &FI = MI.getOperand(FIOperandNum);
581 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
599 int64_t Offset = MI.getOperand(FIOperandNum + 1).getImm() + FIOffset;
600 MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset);
604 if (MI.getOperand(FIOperandNum+3).isImm()) {
606 int Imm = (int)(MI.getOperand(FIOperandNum + 3).getImm());
610 MI.getOperand(FIOperandNum + 3).ChangeToImmediate(Offset);
614 (uint64_t)MI.getOperand(FIOperandNum+3).getOffset()
[all...] |
