| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 469 /// X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and
474 FP_ROUND_INREG,
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 130 setOperationAction(ISD::FP_ROUND_INREG, VT, Expand);
192 setOperationAction(ISD::FP_ROUND_INREG, MVT::v2f64, Expand);
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 250 case ISD::FP_ROUND_INREG: return "fp_round_inreg";
|
| LegalizeVectorOps.cpp | 336 case ISD::FP_ROUND_INREG:
[all...] |
| LegalizeVectorTypes.cpp | 57 case ISD::FP_ROUND_INREG: R = ScalarizeVecRes_InregOp(N); break;
602 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
[all...] |
| SelectionDAG.cpp | [all...] |
| LegalizeDAG.cpp | [all...] |
| LegalizeFloatTypes.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 134 setOperationAction(ISD::FP_ROUND_INREG, MVT::ppcf128, Custom);
690 setOperationAction(ISD::FP_ROUND_INREG , MVT::v4f32, Expand);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 317 setOperationAction(ISD::FP_ROUND_INREG , MVT::f32 , Expand);
[all...] |
