/external/llvm/lib/Target/Mips/ |
MipsSERegisterInfo.h | 35 int FrameIndex, uint64_t StackSize,
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MipsInstrInfo.h | 91 unsigned SrcReg, bool isKill, int FrameIndex, 94 storeRegToStack(MBB, MBBI, SrcReg, isKill, FrameIndex, RC, TRI, 0); 99 unsigned DestReg, int FrameIndex, 102 loadRegFromStack(MBB, MBBI, DestReg, FrameIndex, RC, TRI, 0); 107 unsigned SrcReg, bool isKill, int FrameIndex, 114 unsigned DestReg, int FrameIndex,
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MipsSEInstrInfo.h | 32 /// the destination along with the FrameIndex of the loaded stack slot. If 36 int &FrameIndex) const override; 40 /// the source reg along with the FrameIndex of the loaded stack slot. If 44 int &FrameIndex) const override; 53 unsigned SrcReg, bool isKill, int FrameIndex, 60 unsigned DestReg, int FrameIndex,
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MipsSERegisterInfo.cpp | 106 unsigned OpNo, int FrameIndex, 128 bool EhDataRegFI = MipsFI->isEhDataRegFI(FrameIndex); 129 bool IsISRRegFI = MipsFI->isISRRegFI(FrameIndex); 140 if ((FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI) || EhDataRegFI || 144 if (MFI->hasVarSizedObjects() && !MFI->isFixedObjectIndex(FrameIndex)) 146 else if (MFI->isFixedObjectIndex(FrameIndex))
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Mips16InstrInfo.h | 32 /// the destination along with the FrameIndex of the loaded stack slot. If 36 int &FrameIndex) const override; 40 /// the source reg along with the FrameIndex of the loaded stack slot. If 44 int &FrameIndex) const override; 53 unsigned SrcReg, bool isKill, int FrameIndex, 60 unsigned DestReg, int FrameIndex,
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Mips16RegisterInfo.h | 42 int FrameIndex, uint64_t StackSize,
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Mips16RegisterInfo.cpp | 80 unsigned OpNo, int FrameIndex, 105 if (FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI)
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/external/llvm/lib/Target/Sparc/ |
SparcInstrInfo.h | 54 /// the destination along with the FrameIndex of the loaded stack slot. If 58 int &FrameIndex) const override; 62 /// the source reg along with the FrameIndex of the loaded stack slot. If 66 int &FrameIndex) const override; 86 unsigned SrcReg, bool isKill, int FrameIndex, 92 unsigned DestReg, int FrameIndex,
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/external/llvm/lib/Target/XCore/ |
XCoreInstrInfo.h | 39 /// the destination along with the FrameIndex of the loaded stack slot. If 43 int &FrameIndex) const override; 47 /// the source reg along with the FrameIndex of the loaded stack slot. If 51 int &FrameIndex) const override; 71 unsigned SrcReg, bool isKill, int FrameIndex, 77 unsigned DestReg, int FrameIndex,
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XCoreInstrInfo.cpp | 60 /// the destination along with the FrameIndex of the loaded stack slot. If 64 XCoreInstrInfo::isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const{ 72 FrameIndex = MI->getOperand(1).getIndex(); 81 /// the source reg along with the FrameIndex of the loaded stack slot. If 86 int &FrameIndex) const { 94 FrameIndex = MI->getOperand(1).getIndex(); 362 int FrameIndex, 372 MachinePointerInfo::getFixedStack(*MF, FrameIndex), 373 MachineMemOperand::MOStore, MFI.getObjectSize(FrameIndex), 374 MFI.getObjectAlignment(FrameIndex)); [all...] |
/external/llvm/lib/Target/AMDGPU/ |
AMDGPUInstrInfo.h | 55 int &FrameIndex) const override; 57 int &FrameIndex) const override; 60 int &FrameIndex) const override; 61 unsigned isStoreFromStackSlot(const MachineInstr *MI, int &FrameIndex) const; 63 int &FrameIndex) const; 66 int &FrameIndex) const; 78 unsigned SrcReg, bool isKill, int FrameIndex, 83 unsigned DestReg, int FrameIndex, 91 int FrameIndex) const override;
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AMDGPUInstrInfo.cpp | 48 int &FrameIndex) const { 54 int &FrameIndex) const { 61 int &FrameIndex) const { 66 int &FrameIndex) const { 71 int &FrameIndex) const { 77 int &FrameIndex) const { 94 int FrameIndex, 103 unsigned DestReg, int FrameIndex, 157 MachineBasicBlock::iterator InsertPt, int FrameIndex) const {
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/external/mesa3d/src/gallium/drivers/radeon/ |
AMDGPUInstrInfo.cpp | 44 int &FrameIndex) const { 50 int &FrameIndex) const { 57 int &FrameIndex) const { 62 int &FrameIndex) const { 67 int &FrameIndex) const { 73 int &FrameIndex) const { 125 int FrameIndex, 134 unsigned DestReg, int FrameIndex, 144 int FrameIndex) const {
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AMDGPUInstrInfo.h | 54 unsigned isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const; 56 int &FrameIndex) const; 59 int &FrameIndex) const; 60 unsigned isStoreFromStackSlot(const MachineInstr *MI, int &FrameIndex) const; 62 int &FrameIndex) const; 65 int &FrameIndex) const; 80 unsigned SrcReg, bool isKill, int FrameIndex, 85 unsigned DestReg, int FrameIndex, 93 int FrameIndex) const;
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/external/llvm/lib/Target/ARM/ |
Thumb1InstrInfo.h | 47 unsigned SrcReg, bool isKill, int FrameIndex, 53 unsigned DestReg, int FrameIndex,
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Thumb2InstrInfo.h | 49 unsigned SrcReg, bool isKill, int FrameIndex, 55 unsigned DestReg, int FrameIndex,
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/external/llvm/lib/Target/BPF/ |
BPFInstrInfo.h | 39 bool isKill, int FrameIndex, 45 int FrameIndex, const TargetRegisterClass *RC,
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BPFRegisterInfo.cpp | 56 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!"); 60 int FrameIndex = MI.getOperand(i).getIndex(); 65 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex); 75 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
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/external/llvm/include/llvm/CodeGen/ |
RegisterScavenging.h | 44 ScavengedInfo(int FI = -1) : FrameIndex(FI), Reg(0), Restore(nullptr) {} 47 int FrameIndex; 124 if (I->FrameIndex == FI) 134 if (I->FrameIndex >= 0) 135 A.push_back(I->FrameIndex);
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/external/llvm/lib/Target/PowerPC/ |
PPCRegisterInfo.h | 106 unsigned FrameIndex) const; 108 unsigned FrameIndex) const; 110 unsigned FrameIndex) const; 112 unsigned FrameIndex) const; 114 unsigned FrameIndex) const; 116 unsigned FrameIndex) const;
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/external/llvm/lib/Target/NVPTX/ |
NVPTXRegisterInfo.cpp | 97 int FrameIndex = MI.getOperand(FIOperandNum).getIndex(); 100 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
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/external/llvm/lib/CodeGen/AsmPrinter/ |
DwarfDebug.h | 71 SmallVector<int, 1> FrameIndex; /// Frame index. 85 assert(FrameIndex.empty() && "Already initialized?"); 92 FrameIndex.push_back(FI); 98 assert(FrameIndex.empty() && "Already initialized?"); 120 ArrayRef<int> getFrameIndex() const { return FrameIndex; } 128 assert(!FrameIndex.empty() && "Expected an MMI entry"); 129 assert(!V.FrameIndex.empty() && "Expected an MMI entry"); 130 assert(Expr.size() == FrameIndex.size() && "Mismatched expressions"); 131 assert(V.Expr.size() == V.FrameIndex.size() && "Mismatched expressions"); 134 FrameIndex.append(V.FrameIndex.begin(), V.FrameIndex.end()) [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64InstrInfo.h | 60 int &FrameIndex) const override; 62 int &FrameIndex) const override; 122 bool isKill, int FrameIndex, 128 int FrameIndex, const TargetRegisterClass *RC, 135 int FrameIndex) const override;
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/external/llvm/lib/Target/X86/ |
X86InstrBuilder.h | 45 int FrameIndex; 69 MO.push_back(MachineOperand::CreateFI(Base.FrameIndex)); 131 MIB.addFrameIndex(AM.Base.FrameIndex); 145 /// reference has base register as the FrameIndex offset until it is resolved.
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/external/llvm/lib/Target/WebAssembly/ |
WebAssemblyRegisterInfo.cpp | 62 int FrameIndex = MI.getOperand(FIOperandNum).getIndex(); 64 int FrameOffset = MFI.getStackSize() + MFI.getObjectOffset(FrameIndex);
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