/toolchain/binutils/binutils-2.25/opcodes/ |
m32c-desc.c | 50 { "m32c", MACH_M32C }, 144 { "m32c", "m32c", MACH_M32C, 0 }, 766 { "h-cond32", HW_H_COND32, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cond32, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } }, 767 { "h-cr1-32", HW_H_CR1_32, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cr1_32, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } }, 768 { "h-cr2-32", HW_H_CR2_32, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cr2_32, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } }, 769 { "h-cr3-32", HW_H_CR3_32, CGEN_ASM_KEYWORD, (PTR) & m32c_cgen_opval_h_cr3_32, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } }, 773 { "h-bit-index", HW_H_BIT_INDEX, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } }, 774 { "h-src-index", HW_H_SRC_INDEX, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } }, 775 { "h-dst-index", HW_H_DST_INDEX, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } }, 778 { "h-none", HW_H_NONE, CGEN_ASM_NONE, 0, { 0, { { { (1<<MACH_M32C), 0 } }, { { 1, "\x40" } }, { { RL_TYPE_NONE, 0 } } } } } [all...] |
m32c-asm.c | 55 #define MACH_M32C 5 /* Must match md_begin. */ 308 if (cd->machs == MACH_M32C && ! have_zero && value == 0 [all...] |
m32c-desc.h | 63 MACH_BASE, MACH_M16C, MACH_M32C, MACH_MAX [all...] |
/toolchain/binutils/binutils-2.25/cpu/ |
m32c.opc | 89 #define MACH_M32C 5 /* Must match md_begin. */ 342 if (cd->machs == MACH_M32C && ! have_zero && value == 0
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/toolchain/binutils/binutils-2.25/gas/config/ |
tc-m32c.c | 123 cpu_mach = (1 << MACH_M32C); [all...] |