| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonMCInstrInfo.h | 57 MCInst const &MCI);
60 iterator_range<MCInst::const_iterator> bundleInstructions(MCInst const &MCI);
63 size_t bundleSize(MCInst const &MCI);
71 void clampExtended(MCInstrInfo const &MCII, MCContext &Context, MCInst &MCI);
78 MCInst const &MCI, bool MustExtend);
94 MCInst const &MCI);
97 unsigned getBitCount(MCInstrInfo const &MCII, MCInst const &MCI);
100 unsigned short getCExtOpNum(MCInstrInfo const &MCII, MCInst const &MCI);
102 MCInstrDesc const &getDesc(MCInstrInfo const &MCII, MCInst const &MCI);
112 unsigned short getExtendableOp(MCInstrInfo const &MCII, MCInst const &MCI);
[all...] |
| HexagonMCInstrInfo.cpp | 33 MCInst const &MCI) {
36 MCI.getOperand(HexagonMCInstrInfo::getExtendableOp(MCII, MCI));
40 new (Context) MCInst(HexagonMCInstrInfo::deriveExtender(MCII, MCI, exOp));
46 HexagonMCInstrInfo::bundleInstructions(MCInst const &MCI) {
47 assert(isBundle(MCI));
48 return make_range(MCI.begin() + bundleInstructionsOffset, MCI.end());
51 size_t HexagonMCInstrInfo::bundleSize(MCInst const &MCI) {
52 if (HexagonMCInstrInfo::isBundle(MCI))
[all...] |
| HexagonMCDuplexInfo.cpp | 180 unsigned HexagonMCInstrInfo::getDuplexCandidateGroup(MCInst const &MCI) {
183 switch (MCI.getOpcode()) {
192 DstReg = MCI.getOperand(0).getReg();
193 SrcReg = MCI.getOperand(1).getReg();
198 Hexagon::R29 == SrcReg && inRange<5, 2>(MCI, 2)) {
203 inRange<4, 2>(MCI, 2)) {
210 DstReg = MCI.getOperand(0).getReg();
211 SrcReg = MCI.getOperand(1).getReg();
214 inRange<4>(MCI, 2)) {
231 DstReg = MCI.getOperand(0).getReg()
[all...] |
| HexagonMCChecker.cpp | 57 void HexagonMCChecker::init(MCInst const& MCI) {
58 const MCInstrDesc& MCID = HexagonMCInstrInfo::getDesc(MCII, MCI);
64 if (MCI.getOperand(i).isReg()) {
65 unsigned R = MCI.getOperand(i).getReg();
67 if (HexagonMCInstrInfo::isPredicated(MCII, MCI) && isPredicateRegister(R)) {
70 isTrue = HexagonMCInstrInfo::isPredicatedTrue(MCII, MCI);
73 if (HexagonMCInstrInfo::isPredicatedNew(MCII, MCI))
109 HexagonMCInstrInfo::isPredicateLate(MCII, MCI))
118 unsigned R = MCI.getOperand(i).getReg(),
145 else if (HexagonMCInstrInfo::isPredicateLate(MCII, MCI) && isPredicateRegister(*SRI)
[all...] |
| HexagonMCELFStreamer.cpp | 57 MCInst *MCI = const_cast<MCInst *>(I.getInst());
59 if (HexagonMCInstrInfo::isDuplex(*MCII, *MCI)) {
60 MCInst *SubInst = const_cast<MCInst *>(MCI->getOperand(1).getInst());
63 HexagonMCInstrInfo::clampExtended(*MCII, getContext(), *MCI);
67 Extended = HexagonMCInstrInfo::isImmext(*MCI);
74 MCInst *MCI = const_cast<MCInst *>(I.getInst());
75 EmitSymbol(*MCI);
|
| HexagonInstPrinter.cpp | 49 void HexagonInstPrinter::setExtender(MCInst const &MCI) {
50 HasExtender = HexagonMCInstrInfo::isImmext(MCI);
60 MCInst const &MCI = *I.getInst();
61 if (HexagonMCInstrInfo::isDuplex(MII, MCI)) {
62 printInstruction(MCI.getOperand(1).getInst(), OS);
65 printInstruction(MCI.getOperand(0).getInst(), OS);
67 printInstruction(&MCI, OS);
68 setExtender(MCI);
|
| HexagonMCCompound.cpp | 361 bool lookForCompound(MCInstrInfo const &MCII, MCContext &Context, MCInst &MCI) {
362 assert(HexagonMCInstrInfo::isBundle(MCI));
365 MCI.begin() + HexagonMCInstrInfo::bundleInstructionsOffset;
366 J != MCI.end(); ++J) {
377 MCI.begin() + HexagonMCInstrInfo::bundleInstructionsOffset;
378 B != MCI.end(); ++B) {
395 MCI.erase(B);
413 MCContext &Context, MCInst &MCI) {
414 assert(HexagonMCInstrInfo::isBundle(MCI) &&
418 if (MCI.size() < 2
[all...] |
| HexagonAsmBackend.cpp | 223 MCInst &MCI = const_cast<MCInst &>(HexagonMCInstrInfo::instruction(
240 *RelaxTarget = &MCI;
250 bool Relaxable = isInstRelaxable(MCI);
281 *RelaxTarget = &MCI;
|
| HexagonMCCodeEmitter.h | 43 // Return parse bits for instruction `MCI' inside bundle `MCB'
45 MCInst const &MCI) const;
|
| HexagonInstPrinter.h | 87 void setExtender(MCInst const &MCI);
|
| HexagonMCCodeEmitter.cpp | 42 MCInst const &MCI) const {
43 bool Duplex = HexagonMCInstrInfo::isDuplex(MCII, MCI);
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonMCInstLower.cpp | 83 MCInst *MCI = new (AP.OutContext) MCInst;
84 MCI->setOpcode(MI->getOpcode());
85 assert(MCI->getOpcode() == static_cast<unsigned>(MI->getOpcode()) &&
86 "MCI opcode should have been set on construction");
140 MCI->addOperand(MCO);
142 AP.HexagonProcessInstruction(*MCI, *MI);
143 HexagonMCInstrInfo::extendIfNeeded(AP.OutContext, MCII, MCB, *MCI,
145 MCB.addOperand(MCOperand::createInst(MCI));
|
| /external/llvm/lib/Analysis/ |
| Lint.cpp | 284 MemCpyInst *MCI = cast<MemCpyInst>(&I);
286 visitMemoryReference(I, MCI->getDest(), MemoryLocation::UnknownSize,
287 MCI->getAlignment(), nullptr, MemRef::Write);
288 visitMemoryReference(I, MCI->getSource(), MemoryLocation::UnknownSize,
289 MCI->getAlignment(), nullptr, MemRef::Read);
296 dyn_cast<ConstantInt>(findValue(MCI->getLength(),
300 Assert(AA->alias(MCI->getSource(), Size, MCI->getDest(), Size) !=
|
| /external/llvm/lib/Target/Hexagon/AsmParser/ |
| HexagonAsmParser.cpp | 108 void canonicalizeImmediates(MCInst &MCI);
756 void HexagonAsmParser::canonicalizeImmediates(MCInst &MCI) {
758 NewInst.setOpcode(MCI.getOpcode());
759 for (MCOperand &I : MCI)
766 Warning (MCI.getLoc(), "Signed/Unsigned mismatch");
773 MCI = NewInst;
776 bool HexagonAsmParser::matchOneInstruction(MCInst &MCI, SMLoc IDLoc,
783 MatchInstructionImpl(InstOperands, MCI, ErrorInfo, MatchingInlineAsm);
785 MCI.setLoc(IDLoc);
787 canonicalizeImmediates(MCI);
[all...] |
| /external/llvm/lib/Target/Hexagon/Disassembler/ |
| HexagonDisassembler.cpp | 59 void adjustExtendedInstructions(MCInst &MCI, MCInst const &MCB) const;
407 void HexagonDisassembler::adjustExtendedInstructions(MCInst &MCI,
419 switch (MCI.getOpcode()) {
463 opcode = MCI.getOpcode();
465 MCI.setOpcode(opcode);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FastISel.cpp | [all...] |
