| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUISelLowering.cpp | 198 // RCP_HI = mulhu (RCP, Den) */
199 SDValue RCP_HI = DAG.getNode(ISD::MULHU, DL, VT, RCP, Den);
210 // E = mulhu(ABS_RCP_LO, RCP)
211 SDValue E = DAG.getNode(ISD::MULHU, DL, VT, ABS_RCP_LO, RCP);
223 // Quotient = mulhu(Tmp0, Num)
224 SDValue Quotient = DAG.getNode(ISD::MULHU, DL, VT, Tmp0, Num);
|
| AMDILISelLowering.cpp | 174 setOperationAction(ISD::MULHU, MVT::i64, Expand);
175 setOperationAction(ISD::MULHU, MVT::v2i64, Expand);
|
| /external/llvm/lib/Target/Mips/ |
| Mips16ISelDAGToDAG.cpp | 310 case ISD::MULHU: {
311 MultOpc = (Opcode == ISD::MULHU ? Mips::MultuRxRy16 : Mips::MultRxRy16);
|
| MipsSEISelLowering.cpp | 117 setOperationAction(ISD::MULHU, MVT::i32, Custom);
128 setOperationAction(ISD::MULHU, MVT::i64, Custom);
162 setOperationAction(ISD::MULHU, MVT::i32, Legal);
209 setOperationAction(ISD::MULHU, MVT::i64, Legal);
368 case ISD::MULHU: return lowerMulDiv(Op, MipsISD::Multu, false, true, DAG);
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelDAGToDAG.cpp | 366 case ISD::MULHU:
371 unsigned Opcode = N->getOpcode() == ISD::MULHU ? SP::UMULrr : SP::SMULrr;
|
| SparcISelLowering.cpp | [all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 315 /// MULHU/MULHS - Multiply high - Multiply two integers of type iN,
318 MULHU, MULHS,
[all...] |
| SelectionDAG.h | [all...] |
| /toolchain/binutils/binutils-2.25/gas/config/ |
| rl78-parse.y | 167 %token MACH MACHU MOV MOV1 MOVS MOVW MULH MULHU MULU
503 | MULHU
1300 OPC(MULHU),
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| TargetLowering.cpp | [all...] |
| SelectionDAGDumper.cpp | 178 case ISD::MULHU: return "mulhu";
|
| LegalizeDAG.cpp | [all...] |
| LegalizeVectorTypes.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86IntrinsicsInfo.h | 285 X86_INTRINSIC_DATA(avx2_pmulhu_w, INTR_TYPE_2OP, ISD::MULHU, 0),
[all...] |
| X86ISelLowering.cpp | 281 setOperationAction(ISD::MULHU, VT, Expand);
721 setOperationAction(ISD::MULHU, VT, Expand);
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 141 setOperationAction(ISD::MULHU, MVT::i8, Expand);
146 setOperationAction(ISD::MULHU, MVT::i16, Expand);
[all...] |
| /external/llvm/lib/Target/BPF/ |
| BPFISelLowering.cpp | 122 setOperationAction(ISD::MULHU, MVT::i64, Expand);
|
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyISelLowering.cpp | 152 ISD::MULHS, ISD::MULHU, ISD::SDIVREM, ISD::UDIVREM, ISD::SHL_PARTS,
|
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.cpp | 270 setOperationAction(ISD::MULHU, MVT::i64, Expand);
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 104 setOperationAction(ISD::MULHU, MVT::i32, Expand);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64FastISel.cpp | [all...] |
| AArch64ISelLowering.cpp | 602 setOperationAction(ISD::MULHU, VT, Expand);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 454 setOperationAction(ISD::MULHU, VT, Expand);
[all...] |
