| /external/llvm/lib/Target/SystemZ/InstPrinter/ |
| SystemZInstPrinter.cpp | 64 static void printUImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) {
65 int64_t Value = MI->getOperand(OpNum).getImm();
71 static void printSImmOperand(const MCInst *MI, int OpNum, raw_ostream &O) {
72 int64_t Value = MI->getOperand(OpNum).getImm();
77 void SystemZInstPrinter::printU1ImmOperand(const MCInst *MI, int OpNum,
79 printUImmOperand<1>(MI, OpNum, O);
82 void SystemZInstPrinter::printU2ImmOperand(const MCInst *MI, int OpNum,
84 printUImmOperand<2>(MI, OpNum, O);
87 void SystemZInstPrinter::printU3ImmOperand(const MCInst *MI, int OpNum,
89 printUImmOperand<3>(MI, OpNum, O)
[all...] |
| SystemZInstPrinter.h | 48 void printOperand(const MCInst *MI, int OpNum, raw_ostream &O);
49 void printBDAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
50 void printBDXAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
51 void printBDLAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
52 void printBDVAddrOperand(const MCInst *MI, int OpNum, raw_ostream &O);
53 void printU1ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
54 void printU2ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
55 void printU3ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
56 void printU4ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O);
57 void printU6ImmOperand(const MCInst *MI, int OpNum, raw_ostream &O)
[all...] |
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.h | 41 void printSORegRegOperand(const MCInst *MI, unsigned OpNum,
43 void printSORegImmOperand(const MCInst *MI, unsigned OpNum,
46 void printAddrModeTBB(const MCInst *MI, unsigned OpNum,
48 void printAddrModeTBH(const MCInst *MI, unsigned OpNum,
50 void printAddrMode2Operand(const MCInst *MI, unsigned OpNum,
52 void printAM2PostIndexOp(const MCInst *MI, unsigned OpNum,
54 void printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned OpNum,
56 void printAddrMode2OffsetOperand(const MCInst *MI, unsigned OpNum,
59 void printAddrMode3Operand(const MCInst *MI, unsigned OpNum,
61 void printAddrMode3OffsetOperand(const MCInst *MI, unsigned OpNum,
[all...] |
| ARMInstPrinter.cpp | 359 void ARMInstPrinter::printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum,
362 const MCOperand &MO1 = MI->getOperand(OpNum);
389 void ARMInstPrinter::printSORegRegOperand(const MCInst *MI, unsigned OpNum,
392 const MCOperand &MO1 = MI->getOperand(OpNum);
393 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
394 const MCOperand &MO3 = MI->getOperand(OpNum + 2);
409 void ARMInstPrinter::printSORegImmOperand(const MCInst *MI, unsigned OpNum,
412 const MCOperand &MO1 = MI->getOperand(OpNum);
413 const MCOperand &MO2 = MI->getOperand(OpNum + 1);
499 unsigned OpNum,
[all...] |
| /external/llvm/lib/Target/AArch64/InstPrinter/ |
| AArch64InstPrinter.h | 70 void printAddSubImm(const MCInst *MI, unsigned OpNum,
72 void printLogicalImm32(const MCInst *MI, unsigned OpNum,
74 void printLogicalImm64(const MCInst *MI, unsigned OpNum,
76 void printShifter(const MCInst *MI, unsigned OpNum,
78 void printShiftedRegister(const MCInst *MI, unsigned OpNum,
80 void printExtendedRegister(const MCInst *MI, unsigned OpNum,
82 void printArithExtend(const MCInst *MI, unsigned OpNum,
85 void printMemExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O,
88 void printMemExtend(const MCInst *MI, unsigned OpNum,
90 printMemExtend(MI, OpNum, O, SrcRegKind, Width)
[all...] |
| AArch64InstPrinter.cpp | 649 int OpNum = LdStDesc->ListOperand;
650 printVectorList(MI, OpNum++, STI, O, "");
653 O << '[' << MI->getOperand(OpNum++).getImm() << ']';
[all...] |
| /external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| SystemZMCCodeEmitter.cpp | 60 uint64_t getBDAddr12Encoding(const MCInst &MI, unsigned OpNum,
63 uint64_t getBDAddr20Encoding(const MCInst &MI, unsigned OpNum,
66 uint64_t getBDXAddr12Encoding(const MCInst &MI, unsigned OpNum,
69 uint64_t getBDXAddr20Encoding(const MCInst &MI, unsigned OpNum,
72 uint64_t getBDLAddr12Len8Encoding(const MCInst &MI, unsigned OpNum,
75 uint64_t getBDVAddr12Encoding(const MCInst &MI, unsigned OpNum,
79 // Operand OpNum of MI needs a PC-relative fixup of kind Kind at
82 // is always 0. If AllowTLS is true and optional operand OpNum + 1
84 uint64_t getPCRelEncoding(const MCInst &MI, unsigned OpNum,
89 uint64_t getPC16DBLEncoding(const MCInst &MI, unsigned OpNum,
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430AsmPrinter.cpp | 49 void printOperand(const MachineInstr *MI, int OpNum,
51 void printSrcMemOperand(const MachineInstr *MI, int OpNum,
64 void MSP430AsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
66 const MachineOperand &MO = MI->getOperand(OpNum);
105 void MSP430AsmPrinter::printSrcMemOperand(const MachineInstr *MI, int OpNum,
107 const MachineOperand &Base = MI->getOperand(OpNum);
108 const MachineOperand &Disp = MI->getOperand(OpNum+1);
115 printOperand(MI, OpNum+1, O, "nohash");
120 printOperand(MI, OpNum, O);
|
| /external/llvm/lib/Target/NVPTX/InstPrinter/ |
| NVPTXInstPrinter.h | 40 void printCvtMode(const MCInst *MI, int OpNum, raw_ostream &O,
42 void printCmpMode(const MCInst *MI, int OpNum, raw_ostream &O,
44 void printLdStCode(const MCInst *MI, int OpNum,
46 void printMemOperand(const MCInst *MI, int OpNum,
48 void printProtoIdent(const MCInst *MI, int OpNum,
|
| NVPTXInstPrinter.cpp | 92 void NVPTXInstPrinter::printCvtMode(const MCInst *MI, int OpNum, raw_ostream &O,
94 const MCOperand &MO = MI->getOperand(OpNum);
142 void NVPTXInstPrinter::printCmpMode(const MCInst *MI, int OpNum, raw_ostream &O,
144 const MCOperand &MO = MI->getOperand(OpNum);
215 void NVPTXInstPrinter::printLdStCode(const MCInst *MI, int OpNum,
218 const MCOperand &MO = MI->getOperand(OpNum);
263 void NVPTXInstPrinter::printMemOperand(const MCInst *MI, int OpNum,
265 printOperand(MI, OpNum, O);
269 printOperand(MI, OpNum + 1, O);
271 if (MI->getOperand(OpNum + 1).isImm() &
[all...] |
| /external/llvm/include/llvm/MC/MCParser/ |
| MCParsedAsmOperand.h | 48 void setMCOperandNum (unsigned OpNum) { MCOperandNum = OpNum; }
|
| /external/llvm/lib/Target/BPF/ |
| BPFAsmPrinter.cpp | 43 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O,
49 void BPFAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
51 const MachineOperand &MO = MI->getOperand(OpNum);
|
| /frameworks/compile/libbcc/bcinfo/BitReader_3_0/ |
| BitcodeReader.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMAsmPrinter.h | 67 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O);
69 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
72 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
|
| ARMAsmPrinter.cpp | 175 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
177 const MachineOperand &MO = MI->getOperand(OpNum);
237 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
247 return AsmPrinter::PrintAsmOperand(MI, OpNum, AsmVariant, ExtraCode, O);
249 if (MI->getOperand(OpNum).isReg()) {
251 << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg())
257 if (!MI->getOperand(OpNum).isImm())
259 O << MI->getOperand(OpNum).getImm();
263 printOperand(MI, OpNum, O);
266 if (MI->getOperand(OpNum).isReg())
[all...] |
| Thumb2SizeReduction.cpp | 381 unsigned OpNum = 3; // First 'rest' of operands.
418 OpNum = 4;
437 OpNum = 0;
454 OpNum = 2;
461 OpNum = 0;
468 OpNum = 2;
527 for (unsigned e = MI->getNumOperands(); OpNum != e; ++OpNum)
528 MIB.addOperand(MI->getOperand(OpNum));
[all...] |
| /frameworks/compile/libbcc/bcinfo/BitReader_2_7/ |
| BitcodeReader.cpp | [all...] |
| /external/llvm/lib/Bitcode/Reader/ |
| BitcodeReader.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64AsmPrinter.cpp | 91 void printOperand(const MachineInstr *MI, unsigned OpNum, raw_ostream &O);
97 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
100 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
184 void AArch64AsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNum,
186 const MachineOperand &MO = MI->getOperand(OpNum);
251 bool AArch64AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
254 const MachineOperand &MO = MI->getOperand(OpNum);
257 if (!AsmPrinter::PrintAsmOperand(MI, OpNum, AsmVariant, ExtraCode, O))
277 printOperand(MI, OpNum, O);
307 printOperand(MI, OpNum, O)
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCInstrDesc.h | 162 int getOperandConstraint(unsigned OpNum,
164 if (OpNum < NumOperands &&
165 (OpInfo[OpNum].Constraints & (1 << Constraint))) {
167 return (int)(OpInfo[OpNum].Constraints >> Pos) & 0xf;
|
| /external/llvm/lib/Target/Mips/ |
| MipsAsmPrinter.cpp | 435 bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
442 const MachineOperand &MO = MI->getOperand(OpNum);
446 return AsmPrinter::PrintAsmOperand(MI,OpNum,AsmVariant,ExtraCode,O);
480 if (OpNum == 0)
482 const MachineOperand &FlagsOP = MI->getOperand(OpNum - 1);
498 unsigned RegOp = OpNum;
504 RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum;
507 RegOp = (Subtarget->isLittle()) ? OpNum : OpNum + 1
[all...] |
| /external/llvm/utils/PerfectShuffle/ |
| PerfectShuffle.cpp | 107 unsigned short OpNum;
110 Operator(unsigned short shufflemask, const char *name, unsigned opnum,
112 : Name(name), ShuffleMask(shufflemask), OpNum(opnum),Cost(cost) {
303 for (unsigned opnum = 0, e = TheOperators.size(); opnum != e; ++opnum) {
304 Operator *Op = TheOperators[opnum];
394 unsigned OpNum = ShufTab[i].Op ? ShufTab[i].Op->OpNum : 0
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreAsmPrinter.cpp | 65 void printInlineJT(const MachineInstr *MI, int opNum, raw_ostream &O,
67 void printInlineJT32(const MachineInstr *MI, int opNum, raw_ostream &O) {
68 printInlineJT(MI, opNum, O, ".jmptable32");
70 void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O);
74 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
193 printInlineJT(const MachineInstr *MI, int opNum, raw_ostream &O,
195 unsigned JTI = MI->getOperand(opNum).getIndex();
209 void XCoreAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
212 const MachineOperand &MO = MI->getOperand(opNum);
254 PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.h | 458 getPartialRegUpdateClearance(const MachineInstr *MI, unsigned OpNum,
460 unsigned getUndefRegClearance(const MachineInstr *MI, unsigned &OpNum,
462 void breakPartialRegDependency(MachineBasicBlock::iterator MI, unsigned OpNum,
466 unsigned OpNum,
559 unsigned OpNum,
|
| /external/llvm/lib/CodeGen/ |
| RegAllocFast.cpp | 74 unsigned short LastOpNum; // OpNum on LastUse.
189 LiveRegMap::iterator defineVirtReg(MachineInstr *MI, unsigned OpNum,
191 LiveRegMap::iterator reloadVirtReg(MachineInstr *MI, unsigned OpNum,
194 bool setPhysReg(MachineInstr *MI, unsigned OpNum, unsigned PhysReg);
590 RAFast::defineVirtReg(MachineInstr *MI, unsigned OpNum,
615 LRI->LastOpNum = OpNum;
623 RAFast::reloadVirtReg(MachineInstr *MI, unsigned OpNum,
630 MachineOperand &MO = MI->getOperand(OpNum);
666 LRI->LastOpNum = OpNum;
671 // setPhysReg - Change operand OpNum in MI the refer the PhysReg, considerin
[all...] |
