/external/valgrind/none/tests/s390x/ |
opcodes.h | 47 #define RRS(op1,r1,r2,b4,d4,m3,u0,op2) \ 163 #define CGRB(r1,r2,b4,d4,m3) RRS(ec,r1,r2,b4,d4,m3,0,e4) 194 #define CLGRB(r1,r2,b4,d4,m3) RRS(ec,r1,r2,b4,d4,m3,0,e5) 209 #define CLRB(r1,r2,b4,d4,m3) RRS(ec,r1,r2,b4,d4,m3,0,f7) 214 #define CRB(r1,r2,b4,d4,m3) RRS(ec,r1,r2,b4,d4,m3,0,f6)
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/external/valgrind/VEX/priv/ |
host_arm_defs.h | 146 } RRS; [all...] |
host_arm_defs.c | 216 am->ARMam1.RRS.base = base; 217 am->ARMam1.RRS.index = index; 218 am->ARMam1.RRS.shift = shift; 232 ppHRegARM(am->ARMam1.RRS.base); 234 ppHRegARM(am->ARMam1.RRS.index); 235 vex_printf(",%u)", am->ARMam1.RRS.shift); 248 // addHRegUse(u, HRmRead, am->ARMam1.RRS.base); 249 // addHRegUse(u, HRmRead, am->ARMam1.RRS.index); [all...] |
guest_s390_toIR.c | [all...] |
host_arm_isel.c | 747 toBool( hregClass(am->ARMam1.RRS.base) == HRcInt32 748 && hregIsVirtual(am->ARMam1.RRS.base) 749 && hregClass(am->ARMam1.RRS.index) == HRcInt32 750 && hregIsVirtual(am->ARMam1.RRS.index) 751 && am->ARMam1.RRS.shift >= 0 752 && am->ARMam1.RRS.shift <= 3 ); 770 /* FIXME: add RRS matching */ [all...] |