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    Searched refs:RegA (Results 1 - 4 of 4) sorted by null

  /external/llvm/include/llvm/MC/
MCRegisterInfo.h 424 /// \brief Returns true if RegB is a sub-register of RegA.
425 bool isSubRegister(unsigned RegA, unsigned RegB) const {
426 return isSuperRegister(RegB, RegA);
429 /// \brief Returns true if RegB is a super-register of RegA.
430 bool isSuperRegister(unsigned RegA, unsigned RegB) const;
432 /// \brief Returns true if RegB is a sub-register of RegA or if RegB == RegA.
433 bool isSubRegisterEq(unsigned RegA, unsigned RegB) const {
434 return isSuperRegisterEq(RegB, RegA);
437 /// \brief Returns true if RegB is a super-register of RegA or i
    [all...]
  /external/llvm/lib/CodeGen/
TwoAddressInstructionPass.cpp 109 bool isProfitableToCommute(unsigned regA, unsigned regB, unsigned regC,
115 bool isProfitableToConv3Addr(unsigned RegA, unsigned RegB);
119 unsigned RegA, unsigned RegB, unsigned Dist);
534 regsAreCompatible(unsigned RegA, unsigned RegB, const TargetRegisterInfo *TRI) {
535 if (RegA == RegB)
537 if (!RegA || !RegB)
539 return TRI->regsOverlap(RegA, RegB);
547 isProfitableToCommute(unsigned regA, unsigned regB, unsigned regC,
583 unsigned ToRegA = getMappedReg(regA, DstRegMap);
591 // -RegB is not tied to a register and RegC is compatible with RegA
    [all...]
TargetInstrInfo.cpp 699 unsigned RegA = OpA.getReg();
705 if (TargetRegisterInfo::isVirtualRegister(RegA))
706 MRI.constrainRegClass(RegA, RC);
734 .addReg(RegA, getKillRegState(KillA))
    [all...]
  /external/llvm/lib/Target/Hexagon/
HexagonInstrInfo.cpp     [all...]

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