| /external/llvm/lib/Target/X86/ |
| X86InstrBuilder.h | 39 RegBase,
55 : BaseType(RegBase), Scale(1), IndexReg(0), Disp(0), GV(nullptr),
64 if (BaseType == X86AddressMode::RegBase)
127 if (AM.BaseType == X86AddressMode::RegBase)
|
| X86ISelDAGToDAG.cpp | 53 RegBase,
75 : BaseType(RegBase), Base_FrameIndex(0), Scale(1), IndexReg(), Disp(0),
91 if (BaseType != RegBase) return false;
99 BaseType = RegBase;
844 AM.BaseType == X86ISelAddressMode::RegBase &&
856 AM.BaseType == X86ISelAddressMode::RegBase &&
[all...] |
| X86FastISel.cpp | [all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelDAGToDAG.cpp | 39 RegBase,
57 : BaseType(RegBase), Disp(0), GV(nullptr), CP(nullptr),
67 if (BaseType == RegBase && Base.Reg.getNode() != nullptr) {
169 if (AM.BaseType != MSP430ISelAddressMode::RegBase || AM.Base.Reg.getNode()) {
175 AM.BaseType = MSP430ISelAddressMode::RegBase;
197 if (AM.BaseType == MSP430ISelAddressMode::RegBase
252 if (AM.BaseType == MSP430ISelAddressMode::RegBase) {
|
| /external/llvm/lib/Target/Mips/ |
| MipsFastISel.cpp | 31 typedef enum { RegBase, FrameIndexBase } BaseKind;
46 Address() : Kind(RegBase), Offset(0), GV(0) { Base.Reg = 0; }
49 bool isRegBase() const { return Kind == RegBase; }
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCFastISel.cpp | 68 RegBase,
81 : BaseType(RegBase), Offset(0) {
433 Addr.BaseType = Address::RegBase;
526 // into a RegBase.
659 // into a RegBase.
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMFastISel.cpp | 57 RegBase,
70 : BaseType(RegBase), Offset(0) {
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64FastISel.cpp | 49 RegBase,
66 Address() : Kind(RegBase), ExtType(AArch64_AM::InvalidShiftExtend),
72 bool isRegBase() const { return Kind == RegBase; }
[all...] |
| /external/clang/lib/CodeGen/ |
| TargetInfo.cpp | [all...] |
