| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | [all...] |
| /external/llvm/lib/CodeGen/ |
| Analysis.cpp | 168 case FCmpInst::FCMP_OGE: return ISD::SETOGE;
192 case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE;
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 132 setOperationAction(ISD::SETOGE, VT, Expand);
556 cv = DAG.getSetCC(DL, INTTY, fr, fb, ISD::SETOGE);
558 cv = DAG.getSetCC(DL, INTTY, fr, fb, ISD::SETOGE);
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 332 case ISD::SETOGE: return "setoge";
|
| TargetLowering.cpp | 145 case ISD::SETOGE:
[all...] |
| SelectionDAG.cpp | [all...] |
| LegalizeDAG.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | [all...] |
| PPCISelLowering.cpp | 353 setCondCodeAction(ISD::SETOGE, MVT::f32, Expand);
354 setCondCodeAction(ISD::SETOGE, MVT::f64, Expand);
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 191 setCondCodeAction(ISD::SETOGE, MVT::f32, Expand);
196 setCondCodeAction(ISD::SETOGE, MVT::f64, Expand);
323 setCondCodeAction(ISD::SETOGE, Ty, Expand);
[all...] |
| MipsISelLowering.cpp | 520 case ISD::SETOGE: return Mips::FCOND_OGE;
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
