| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | [all...] |
| /external/llvm/lib/CodeGen/ |
| Analysis.cpp | 174 case FCmpInst::FCMP_UEQ: return ISD::SETUEQ;
187 case ISD::SETOEQ: case ISD::SETUEQ: return ISD::SETEQ;
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600ISelLowering.cpp | 449 case ISD::SETUEQ:
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 339 case ISD::SETUEQ: return "setueq";
|
| TargetLowering.cpp | 179 case ISD::SETUEQ:
[all...] |
| SelectionDAG.cpp | 335 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
[all...] |
| LegalizeDAG.cpp | [all...] |
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyISelLowering.cpp | 131 for (auto CC : {ISD::SETO, ISD::SETUO, ISD::SETUEQ, ISD::SETONE,
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | [all...] |
| PPCISelLowering.cpp | 351 setCondCodeAction(ISD::SETUEQ, MVT::f32, Expand);
352 setCondCodeAction(ISD::SETUEQ, MVT::f64, Expand);
549 setCondCodeAction(ISD::SETUEQ, MVT::v4f32, Expand);
594 setCondCodeAction(ISD::SETUEQ, MVT::v2f64, Expand);
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| R600ISelLowering.cpp | 53 setCondCodeAction(ISD::SETUEQ, MVT::f32, Expand);
[all...] |
| AMDGPUISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 529 case ISD::SETUEQ: return Mips::FCOND_UEQ;
[all...] |
| MipsSEISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
