/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | [all...] |
SelectionDAGNodes.h | [all...] |
/external/llvm/lib/Target/BPF/ |
BPFISelLowering.cpp | 153 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); 155 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); 156 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Expand); 157 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i32, Expand);
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/external/llvm/lib/Target/AMDGPU/ |
SIISelLowering.cpp | 139 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); 140 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Legal); 141 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Legal); 142 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i32, Expand); 156 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v8i16, Expand); 157 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v16i16, Expand); 560 ISD::LoadExtType ExtTy = Signed ? ISD::SEXTLOAD : ISD::ZEXTLOAD; [all...] |
R600ISelLowering.cpp | 134 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); 135 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Custom); 136 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Custom); [all...] |
AMDGPUISelLowering.cpp | 186 setLoadExtAction(ISD::SEXTLOAD, MVT::i64, VT, Expand); 192 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i8, Expand); 195 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i8, Expand); 198 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v2i16, Expand); 201 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i16, Expand); [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 82 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); 84 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); 85 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Expand); [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelDAGToDAG.cpp | 429 if (LD->getValueType(0) == MVT::i64 && ExtType == ISD::SEXTLOAD) 628 // Handle sign_extend and sextload. 639 LD->getExtensionType() != ISD::SEXTLOAD || 665 LD->getExtensionType() != ISD::SEXTLOAD || [all...] |
HexagonISelLowering.cpp | [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 502 case ISD::SEXTLOAD: OS << ", sext"; break;
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DAGCombiner.cpp | [all...] |
LegalizeVectorOps.cpp | 605 case ISD::SEXTLOAD: [all...] |
LegalizeIntegerTypes.cpp | 492 N->getMemOperand(), ISD::SEXTLOAD); [all...] |
LegalizeDAG.cpp | [all...] |
/external/llvm/lib/Target/WebAssembly/ |
WebAssemblyISelLowering.cpp | 186 for (auto Ext : {ISD::EXTLOAD, ISD::ZEXTLOAD, ISD::SEXTLOAD})
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/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | 140 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | 131 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); 133 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i8, Expand); [all...] |
/external/llvm/lib/Target/Mips/ |
MipsISelLowering.cpp | 242 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); 418 setLoadExtAction(ISD::SEXTLOAD, MVT::i64, MVT::i32, Custom); [all...] |
/external/llvm/lib/Target/NVPTX/ |
NVPTXISelLowering.cpp | 230 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); [all...] |
NVPTXISelDAGToDAG.cpp | 703 // Sign : ISD::SEXTLOAD 711 if ((LD->getExtensionType() == ISD::SEXTLOAD)) 931 // Sign : ISD::SEXTLOAD 942 if (ExtensionType == ISD::SEXTLOAD) [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | 241 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i1, Promote); 274 setLoadExtAction(ISD::SEXTLOAD, VT, InnerVT, Expand); [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelDAGToDAG.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelDAGToDAG.cpp | [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelDAGToDAG.cpp | [all...] |