| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 197 /// SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing
200 SMUL_LOHI, UMUL_LOHI,
[all...] |
| SelectionDAG.h | [all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips16ISelDAGToDAG.cpp | 295 case ISD::SMUL_LOHI:
|
| MipsSEISelLowering.cpp | 114 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Custom);
125 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Custom);
158 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand);
205 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand);
365 case ISD::SMUL_LOHI: return lowerMulDiv(Op, MipsISD::Mult, true, true, DAG);
410 if (MultOpc != ISD::SMUL_LOHI && MultOpc != ISD::UMUL_LOHI)
482 if (MultOpc != ISD::SMUL_LOHI && MultOpc != ISD::UMUL_LOHI)
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 120 setOperationAction(ISD::SMUL_LOHI, VT, Expand);
148 setOperationAction(ISD::SMUL_LOHI, VT, Expand);
168 setOperationAction(ISD::SMUL_LOHI, VT, Expand);
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| TargetLowering.cpp | [all...] |
| SelectionDAGDumper.cpp | 184 case ISD::SMUL_LOHI: return "smul_lohi";
|
| LegalizeDAG.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 101 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Custom);
216 case ISD::SMUL_LOHI: return LowerSMUL_LOHI(Op, DAG);
571 assert(Op.getValueType() == MVT::i32 && Op.getOpcode() == ISD::SMUL_LOHI &&
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 142 setOperationAction(ISD::SMUL_LOHI, MVT::i8, Expand);
147 setOperationAction(ISD::SMUL_LOHI, MVT::i16, Expand);
[all...] |
| /external/llvm/lib/Target/BPF/ |
| BPFISelLowering.cpp | 125 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand);
|
| /external/llvm/lib/Target/WebAssembly/ |
| WebAssemblyISelLowering.cpp | 151 {ISD::BSWAP, ISD::ROTL, ISD::ROTR, ISD::SMUL_LOHI, ISD::UMUL_LOHI,
|
| /external/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | [all...] |
| X86ISelLowering.cpp | 718 setOperationAction(ISD::SMUL_LOHI, VT, Expand);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.cpp | 250 setOperationAction(ISD::SMUL_LOHI, VT, Expand);
315 setOperationAction(ISD::SMUL_LOHI, VT, Expand);
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | 453 setOperationAction(ISD::SMUL_LOHI, VT, Expand);
[all...] |
| ARMISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 194 setOperationAction(ISD::SMUL_LOHI, VT, Custom);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 150 // Don't use SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM to lower SREM/UREM.
152 setOperationAction(ISD::SMUL_LOHI, MVT::i32, Expand);
154 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand);
476 setOperationAction(ISD::SMUL_LOHI, VT, Expand);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 225 setOperationAction(ISD::SMUL_LOHI, MVT::i64, Expand);
601 setOperationAction(ISD::SMUL_LOHI, VT, Expand);
[all...] |
