| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | 367 bool isVPKUHUMShuffleMask(ShuffleVectorSDNode *N, unsigned ShuffleKind,
372 bool isVPKUWUMShuffleMask(ShuffleVectorSDNode *N, unsigned ShuffleKind,
377 bool isVPKUDUMShuffleMask(ShuffleVectorSDNode *N, unsigned ShuffleKind,
382 bool isVMRGLShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize,
387 bool isVMRGHShuffleMask(ShuffleVectorSDNode *N, unsigned UnitSize,
392 bool isVMRGEOShuffleMask(ShuffleVectorSDNode *N, bool CheckEven,
403 bool isSplatShuffleMask(ShuffleVectorSDNode *N, unsigned EltSize);
[all...] |
| PPCISelLowering.cpp | [all...] |
| PPCISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 410 } else if (const ShuffleVectorSDNode *SVN =
411 dyn_cast<ShuffleVectorSDNode>(this)) {
|
| LegalizeTypes.h | 670 void SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N, SDValue &Lo,
[all...] |
| DAGCombiner.cpp | [all...] |
| SelectionDAG.cpp | 515 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
[all...] |
| LegalizeVectorTypes.cpp | 621 SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi);
[all...] |
| LegalizeIntegerTypes.cpp | [all...] |
| LegalizeDAG.cpp | [all...] |
| /external/llvm/include/llvm/CodeGen/ |
| SelectionDAGNodes.h | [all...] |
| SelectionDAG.h | 589 SDValue getCommutedVectorShuffle(const ShuffleVectorSDNode &SV);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
