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    Searched refs:Src2Reg (Results 1 - 7 of 7) sorted by null

  /external/llvm/lib/Target/Hexagon/MCTargetDesc/
HexagonMCDuplexInfo.cpp 181 unsigned DstReg, PredReg, SrcReg, Src1Reg, Src2Reg;
321 Src2Reg = MCI.getOperand(2).getReg();
323 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg) &&
329 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg) &&
337 Src2Reg = MCI.getOperand(2).getReg();
339 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg) &&
356 Src2Reg = MCI.getOperand(2).getReg();
358 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg) &&
366 Src2Reg = MCI.getOperand(2).getReg();
367 if (HexagonMCInstrInfo::isDblRegForSubInst(Src2Reg) &
    [all...]
HexagonMCCompound.cpp 84 unsigned DstReg, SrcReg, Src1Reg, Src2Reg;
102 Src2Reg = MI.getOperand(2).getReg();
105 HexagonMCInstrInfo::isIntRegForSubInst(Src2Reg))
  /external/llvm/lib/Target/Hexagon/
HexagonInstrInfo.cpp     [all...]
  /external/llvm/lib/Target/ARM/
MLxExpansionPass.cpp 279 unsigned Src2Reg = MI->getOperand(3).getReg();
295 .addReg(Src2Reg, getKillRegState(Src2Kill));
  /external/llvm/lib/Target/AArch64/
AArch64FastISel.cpp     [all...]
  /external/llvm/lib/Target/Mips/
MipsFastISel.cpp 982 unsigned Src2Reg = getRegForValue(SI->getFalseValue());
985 if (!Src1Reg || !Src2Reg || !CondReg)
1001 emitInst(TargetOpcode::COPY, TempReg).addReg(Src2Reg);
    [all...]
  /external/llvm/lib/Target/AMDGPU/
SIInstrInfo.cpp     [all...]

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