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Searched
refs:SubReg0
(Results
1 - 4
of
4
) sorted by null
/external/llvm/lib/Target/AArch64/
AArch64AdvSIMDScalarPass.cpp
214
unsigned Src0 = 0,
SubReg0
;
220
Src0 = getSrcFromCopy(&*Def, MRI,
SubReg0
);
307
unsigned Src0 = 0,
SubReg0
;
313
Src0 = getSrcFromCopy(&*Def, MRI,
SubReg0
);
338
SubReg0
= 0;
357
.addReg(Src0, getKillRegState(true),
SubReg0
)
/external/llvm/lib/CodeGen/
TargetInstrInfo.cpp
142
unsigned
SubReg0
= HasDef ? MI->getOperand(0).getSubReg() : 0;
157
SubReg0
= SubReg2;
162
SubReg0
= SubReg1;
173
MI->getOperand(0).setSubReg(
SubReg0
);
[
all
...]
/external/llvm/lib/Target/ARM/
ARMISelDAGToDAG.cpp
[
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...]
/external/llvm/lib/Target/AMDGPU/
AMDGPUISelDAGToDAG.cpp
407
SDValue RC,
SubReg0
, SubReg1;
414
SubReg0
= CurDAG->getTargetConstant(AMDGPU::sub0_sub1, DL, MVT::i32);
418
SubReg0
= CurDAG->getTargetConstant(AMDGPU::sub0, DL, MVT::i32);
423
const SDValue Ops[] = { RC, N->getOperand(0),
SubReg0
,
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...]
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