| /external/llvm/lib/Target/X86/ |
| X86TargetTransformInfo.cpp | 535 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 },
536 { ISD::UINT_TO_FP, MVT::v4f64, MVT::v4i64, 1 },
537 { ISD::UINT_TO_FP, MVT::v8f64, MVT::v8i64, 1 },
538 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i64, 1 },
539 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i64, 1 },
540 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i64, 1 },
582 { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i1, 3 },
583 { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i8, 2 },
584 { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i16, 2 },
585 { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i32, 1 }
[all...] |
| X86IntrinsicsInfo.h | [all...] |
| X86ISelLowering.cpp | 160 // Promote all UINT_TO_FP to larger SINT_TO_FP's, as X86 doesn't have this
162 setOperationAction(ISD::UINT_TO_FP , MVT::i1 , Promote);
163 setOperationAction(ISD::UINT_TO_FP , MVT::i8 , Promote);
164 setOperationAction(ISD::UINT_TO_FP , MVT::i16 , Promote);
169 setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Custom);
171 setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Promote);
172 setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Custom);
176 setOperationAction(ISD::UINT_TO_FP , MVT::i64 , Custom);
179 setOperationAction(ISD::UINT_TO_FP , MVT::i32 , Custom);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 104 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 },
107 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 },
109 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 2 },
111 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 },
113 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i1, 3 },
115 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8, 3 },
117 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 },
119 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i16, 4 },
121 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i32, 2 },
123 { ISD::UINT_TO_FP, MVT::v16f32, MVT::v16i16, 8 }
[all...] |
| ARMISelLowering.cpp | 105 setOperationAction(ISD::UINT_TO_FP, VT, Custom);
110 setOperationAction(ISD::UINT_TO_FP, VT, Expand);
565 // Neon does not have single instruction SINT_TO_FP and UINT_TO_FP with
570 setOperationAction(ISD::UINT_TO_FP, MVT::v4i16, Custom);
676 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64TargetTransformInfo.cpp | 218 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i32, 1 },
219 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 },
220 { ISD::UINT_TO_FP, MVT::v2f64, MVT::v2i64, 1 },
226 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i8, 3 },
227 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i16, 3 },
228 { ISD::UINT_TO_FP, MVT::v2f32, MVT::v2i64, 2 },
233 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8, 3 },
234 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i16, 2 },
239 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i8, 10 },
240 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i16, 4 }
[all...] |
| AArch64ISelLowering.cpp | 182 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom);
183 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom);
184 setOperationAction(ISD::UINT_TO_FP, MVT::i128, Custom);
482 setTargetDAGCombine(ISD::UINT_TO_FP);
559 setOperationAction(ISD::UINT_TO_FP, MVT::v1i64, Expand);
566 setOperationAction(ISD::UINT_TO_FP, MVT::v4i8, Promote);
568 setOperationAction(ISD::UINT_TO_FP, MVT::v4i16, Promote);
573 setOperationAction(ISD::UINT_TO_FP, MVT::v8i8, Promote);
575 setOperationAction(ISD::UINT_TO_FP, MVT::v8i16, Promote);
578 setOperationAction(ISD::UINT_TO_FP, MVT::v2i32, Custom)
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 403 UINT_TO_FP,
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 340 case ISD::UINT_TO_FP:
388 case ISD::UINT_TO_FP:
452 unsigned Opc = Op.getOpcode() == ISD::UINT_TO_FP ? ISD::ZERO_EXTEND :
714 case ISD::UINT_TO_FP:
[all...] |
| LegalizeVectorTypes.cpp | 99 case ISD::UINT_TO_FP:
443 case ISD::UINT_TO_FP:
654 case ISD::UINT_TO_FP:
[all...] |
| LegalizeDAG.cpp | [all...] |
| SelectionDAGDumper.cpp | 254 case ISD::UINT_TO_FP: return "uint_to_fp";
|
| LegalizeFloatTypes.cpp | 110 case ISD::UINT_TO_FP: R = SoftenFloatRes_XINT_TO_FP(N); break;
[all...] |
| DAGCombiner.cpp | [all...] |
| LegalizeIntegerTypes.cpp | [all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600ISelLowering.cpp | 412 ConversionOp = ISD::UINT_TO_FP;
|
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.cpp | 274 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom);
310 setOperationAction(ISD::UINT_TO_FP, VT, Expand);
633 case ISD::UINT_TO_FP: return LowerUINT_TO_FP(Op, DAG);
[all...] |
| R600ISelLowering.cpp | [all...] |
| SIISelLowering.cpp | 266 setTargetDAGCombine(ISD::UINT_TO_FP);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | 107 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Promote);
108 AddPromotedToType(ISD::UINT_TO_FP, MVT::i1,
112 setOperationAction(ISD::UINT_TO_FP, MVT::i1, Custom);
256 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand);
365 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand);
383 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Custom);
389 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom);
512 setOperationAction(ISD::UINT_TO_FP, MVT::v4i32, Legal);
639 setOperationAction(ISD::UINT_TO_FP, MVT::v2i64, Legal);
[all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 330 setOperationAction(ISD::UINT_TO_FP, MVT::i32, Expand);
331 setOperationAction(ISD::UINT_TO_FP, MVT::i64, Expand);
[all...] |
| MipsSEISelLowering.cpp | 282 setOperationAction(ISD::UINT_TO_FP, Ty, Legal);
[all...] |
