/external/llvm/lib/Target/Mips/ |
Mips16ISelDAGToDAG.cpp | 296 case ISD::UMUL_LOHI: { 297 MultOpc = (Opcode == ISD::UMUL_LOHI ? Mips::MultuRxRy16 : Mips::MultRxRy16);
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MipsSEISelLowering.cpp | 115 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Custom); 126 setOperationAction(ISD::UMUL_LOHI, MVT::i64, Custom); 159 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand); 206 setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand); 366 case ISD::UMUL_LOHI: return lowerMulDiv(Op, MipsISD::Multu, true, true, DAG); 410 if (MultOpc != ISD::SMUL_LOHI && MultOpc != ISD::UMUL_LOHI) 436 MultOpc = MultOpc == ISD::UMUL_LOHI ? MipsISD::MAddu : MipsISD::MAdd; 482 if (MultOpc != ISD::SMUL_LOHI && MultOpc != ISD::UMUL_LOHI) 508 MultOpc = MultOpc == ISD::UMUL_LOHI ? MipsISD::MSubu : MipsISD::MSub; [all...] |
/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 197 /// SMUL_LOHI/UMUL_LOHI - Multiply two integers of type iN, producing 200 SMUL_LOHI, UMUL_LOHI, [all...] |
SelectionDAG.h | [all...] |
/external/mesa3d/src/gallium/drivers/radeon/ |
AMDILISelLowering.cpp | 121 setOperationAction(ISD::UMUL_LOHI, VT, Expand); 149 setOperationAction(ISD::UMUL_LOHI, VT, Expand);
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/external/llvm/lib/CodeGen/SelectionDAG/ |
TargetLowering.cpp | [all...] |
SelectionDAGDumper.cpp | 185 case ISD::UMUL_LOHI: return "umul_lohi";
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LegalizeDAG.cpp | [all...] |
DAGCombiner.cpp | [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | 102 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Custom); 217 case ISD::UMUL_LOHI: return LowerUMUL_LOHI(Op, DAG); 588 assert(Op.getValueType() == MVT::i32 && Op.getOpcode() == ISD::UMUL_LOHI && [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 143 setOperationAction(ISD::UMUL_LOHI, MVT::i8, Expand); 148 setOperationAction(ISD::UMUL_LOHI, MVT::i16, Expand); [all...] |
/external/llvm/lib/Target/BPF/ |
BPFISelLowering.cpp | 124 setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand);
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/external/llvm/lib/Target/WebAssembly/ |
WebAssemblyISelLowering.cpp | 151 {ISD::BSWAP, ISD::ROTL, ISD::ROTR, ISD::SMUL_LOHI, ISD::UMUL_LOHI,
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/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelDAGToDAG.cpp | [all...] |
X86ISelLowering.cpp | 720 setOperationAction(ISD::UMUL_LOHI, VT, Expand); [all...] |
/external/llvm/lib/Target/AMDGPU/ |
AMDGPUISelLowering.cpp | 251 setOperationAction(ISD::UMUL_LOHI, VT, Expand); 316 setOperationAction(ISD::UMUL_LOHI, VT, Expand); [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | 455 setOperationAction(ISD::UMUL_LOHI, VT, Expand); [all...] |
ARMISelDAGToDAG.cpp | [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | 195 setOperationAction(ISD::UMUL_LOHI, VT, Custom); [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | 150 // Don't use SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM to lower SREM/UREM. 151 setOperationAction(ISD::UMUL_LOHI, MVT::i32, Expand); 153 setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand); 475 setOperationAction(ISD::UMUL_LOHI, VT, Expand); [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | 224 setOperationAction(ISD::UMUL_LOHI, MVT::i64, Expand); 603 setOperationAction(ISD::UMUL_LOHI, VT, Expand); [all...] |