| /external/llvm/lib/Target/ARM/ |
| ARMCallingConv.h | 28 static bool f64AssignAPCS(unsigned &ValNo, MVT &ValVT, MVT &LocVT,
35 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
42 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT,
50 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
52 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT,
58 static bool CC_ARM_APCS_Custom_f64(unsigned &ValNo, MVT &ValVT, MVT &LocVT,
62 if (!f64AssignAPCS(ValNo, ValVT, LocVT, LocInfo, State, true))
65 !f64AssignAPCS(ValNo, ValVT, LocVT, LocInfo, State, false))
71 static bool f64AssignAAPCS(unsigned &ValNo, MVT &ValVT, MVT &LocVT,
91 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT,
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| CallingConvLower.h | 70 /// ValVT - The type of the value being assigned.
71 MVT ValVT;
77 static CCValAssign getReg(unsigned ValNo, MVT ValVT,
86 Ret.ValVT = ValVT;
91 static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT,
95 Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP);
100 static CCValAssign getMem(unsigned ValNo, MVT ValVT,
109 Ret.ValVT = ValVT;
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86CallingConv.h | 23 inline bool CC_X86_32_VectorCallIndirect(unsigned &ValNo, MVT &ValVT,
|
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64CallingConvention.h | 66 unsigned &ValNo, MVT &ValVT, MVT &LocVT, CCValAssign::LocInfo &LocInfo,
73 CCValAssign::getPending(ValNo, ValVT, LocVT, LocInfo));
84 static bool CC_AArch64_Custom_Block(unsigned &ValNo, MVT &ValVT, MVT &LocVT,
110 CCValAssign::getPending(ValNo, ValVT, LocVT, LocInfo));
|
| AArch64ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 105 CC_Hexagon(unsigned ValNo, MVT ValVT,
110 CC_Hexagon32(unsigned ValNo, MVT ValVT,
115 CC_Hexagon64(unsigned ValNo, MVT ValVT,
120 CC_HexagonVector(unsigned ValNo, MVT ValVT,
125 RetCC_Hexagon(unsigned ValNo, MVT ValVT,
130 RetCC_Hexagon32(unsigned ValNo, MVT ValVT,
135 RetCC_Hexagon64(unsigned ValNo, MVT ValVT,
140 RetCC_HexagonVector(unsigned ValNo, MVT ValVT,
145 CC_Hexagon_VarArg (unsigned ValNo, MVT ValVT,
152 return CC_Hexagon(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | 590 LegalizeAction getLoadExtAction(unsigned ExtType, EVT ValVT,
592 if (ValVT.isExtended() || MemVT.isExtended()) return Expand;
593 unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy;
601 bool isLoadExtLegal(unsigned ExtType, EVT ValVT, EVT MemVT) const {
602 return ValVT.isSimple() && MemVT.isSimple() &&
603 getLoadExtAction(ExtType, ValVT, MemVT) == Legal;
608 bool isLoadExtLegalOrCustom(unsigned ExtType, EVT ValVT, EVT MemVT) const {
609 return ValVT.isSimple() && MemVT.isSimple() &&
610 (getLoadExtAction(ExtType, ValVT, MemVT) == Legal ||
611 getLoadExtAction(ExtType, ValVT, MemVT) == Custom)
[all...] |
| /external/llvm/lib/CodeGen/ |
| CallingConvLower.cpp | 44 void CCState::HandleByVal(unsigned ValNo, MVT ValVT,
58 addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
|
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | [all...] |
| MipsFastISel.cpp | 210 static bool CC_Mips(unsigned ValNo, MVT ValVT, MVT LocVT,
214 static bool CC_MipsO32_FP32(unsigned ValNo, MVT ValVT, MVT LocVT,
220 static bool CC_MipsO32_FP64(unsigned ValNo, MVT ValVT, MVT LocVT,
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeTypes.cpp | [all...] |
| LegalizeTypes.h | 189 SDValue PromoteTargetBoolean(SDValue Bool, EVT ValVT);
191 /// Modify Bit Vector to match SetCC result type of ValVT.
193 SDValue WidenTargetBoolean(SDValue Bool, EVT ValVT, bool WithZeroes = false);
[all...] |
| LegalizeVectorOps.cpp | 232 MVT ValVT = ST->getValue().getSimpleValueType();
234 switch (TLI.getTruncStoreAction(ValVT, StVT)) {
[all...] |
| LegalizeVectorTypes.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | [all...] |
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | 39 static bool CC_Sparc_Assign_SRet(unsigned &ValNo, MVT &ValVT,
46 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT,
52 static bool CC_Sparc_Assign_Split_64(unsigned &ValNo, MVT &ValVT,
61 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
64 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT,
72 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
74 State.addLoc(CCValAssign::getCustomMem(ValNo, ValVT,
80 static bool CC_Sparc_Assign_Ret_Split_64(unsigned &ValNo, MVT &ValVT,
90 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo));
96 State.addLoc(CCValAssign::getCustomReg(ValNo, ValVT, Reg, LocVT, LocInfo))
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.cpp | 34 static bool allocateStack(unsigned ValNo, MVT ValVT, MVT LocVT,
37 unsigned Offset = State.AllocateStack(ValVT.getStoreSize(),
39 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
[all...] |
