/external/cblas/src/ |
cblas_stpmv.c | 3 * cblas_stpmv.c 11 void cblas_stpmv(const enum CBLAS_ORDER order, const enum CBLAS_UPLO Uplo, function 42 cblas_xerbla(2, "cblas_stpmv","Illegal Uplo setting, %d\n", Uplo); 52 cblas_xerbla(3, "cblas_stpmv","Illegal TransA setting, %d\n", TransA); 61 cblas_xerbla(4, "cblas_stpmv","Illegal Diag setting, %d\n", Diag); 80 cblas_xerbla(2, "cblas_stpmv","Illegal Uplo setting, %d\n", Uplo); 91 cblas_xerbla(3, "cblas_stpmv","Illegal TransA setting, %d\n", TransA); 101 cblas_xerbla(4, "cblas_stpmv","Illegal Diag setting, %d\n", Diag); 114 else cblas_xerbla(1, "cblas_stpmv", "Illegal Order setting, %d\n", order);
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Makefile | 111 cblas_stbmv.o cblas_stbsv.o cblas_stpmv.o cblas_stpsv.o cblas_strmv.o \
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/external/cblas/testing/ |
c_s2chke.c | 425 } else if (strncmp( sf,"cblas_stpmv",11)==0) { 426 cblas_rout = "cblas_stpmv"; 428 cblas_stpmv(INVALID, CblasUpper, CblasNoTrans, 432 cblas_stpmv(CblasColMajor, INVALID, CblasNoTrans, 436 cblas_stpmv(CblasColMajor, CblasUpper, INVALID, 440 cblas_stpmv(CblasColMajor, CblasUpper, CblasNoTrans, 444 cblas_stpmv(CblasColMajor, CblasUpper, CblasNoTrans, 448 cblas_stpmv(CblasColMajor, CblasUpper, CblasNoTrans, 452 cblas_stpmv(CblasRowMajor, INVALID, CblasNoTrans, 456 cblas_stpmv(CblasRowMajor, CblasUpper, INVALID, [all...] |
c_sblas2.c | 431 cblas_stpmv( CblasRowMajor, uplo, trans, diag, *n, AP, x, *incx ); 435 cblas_stpmv( CblasColMajor, uplo, trans, diag, *n, ap, x, *incx );
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c_sblat2.f | 34 * cblas_stpmv T PUT F FOR NO TEST. SAME COLUMNS. 115 $ 'cblas_strmv ','cblas_stbmv ','cblas_stpmv ', [all...] |
/frameworks/rs/cpu_ref/ |
rsCpuBLAS.inc | 28 RS_APPLY_MACRO_TO(cblas_stpmv)
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rsCpuIntrinsicBLAS.cpp | 159 cblas_stpmv(CblasRowMajor, Uplo, TransA, Diag, call->N, (float*)A, [all...] |
/external/cblas/ |
Android.mk | 123 src/cblas_stpmv.c \
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/external/cblas/include/ |
cblas.h | 165 void cblas_stpmv(const enum CBLAS_ORDER order, const enum CBLAS_UPLO Uplo,
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/external/libgdx/backends/gdx-backend-moe/libs/ |
intel-moe-ios.jar | |