| /external/llvm/lib/Target/ARM/ |
| ARMFastISel.cpp | 292 Op0 = constrainOperandRegClass(II, Op0, 1);
315 Op0 = constrainOperandRegClass(II, Op0, 1);
316 Op1 = constrainOperandRegClass(II, Op1, 2);
344 Op0 = constrainOperandRegClass(II, Op0, 1);
345 Op1 = constrainOperandRegClass(II, Op1, 2);
346 Op2 = constrainOperandRegClass(II, Op1, 3);
375 Op0 = constrainOperandRegClass(II, Op0, 1);
402 Op0 = constrainOperandRegClass(II, Op0, 1);
403 Op1 = constrainOperandRegClass(II, Op1, 2);
570 ResultReg = constrainOperandRegClass(TII.get(ARM::LDRcp), ResultReg, 0)
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| FastISel.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64FastISel.cpp | [all...] |
| /external/llvm/include/llvm/CodeGen/ |
| FastISel.h | 472 unsigned constrainOperandRegClass(const MCInstrDesc &II, unsigned Op,
|
| /external/llvm/lib/Target/Mips/ |
| MipsFastISel.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86FastISel.cpp | 257 AM.IndexReg = constrainOperandRegClass(MIB->getDesc(), AM.IndexReg,
[all...] |
