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Searched
refs:dIn1RS
(Results
1 - 2
of
2
) sorted by null
/frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/
armVCM4P10_TransformResidual4x4_s.s
84
dIn1RS
DN D7.S16
136
VHADD
dIn1RS
,dIn1,dZero ;// (f1>>1) constZero is a register holding 0
138
VSUB de2,
dIn1RS
,dIn3 ;// e2 = (d1>>1) - d3
omxVCM4P10_DequantTransformResidualFromPairAndAdd_s.s
163
dIn1RS
DN D7.S16
310
VHADD
dIn1RS
,dIn1,dZero ;// (f1>>1) constZero is a register holding 0
312
VSUB de2,
dIn1RS
,dIn3 ;// e2 = (d1>>1) - d3
Completed in 2761 milliseconds