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Searched
refs:divwu
(Results
1 - 12
of
12
) sorted by null
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/ppc/
476.s
104
divwu
10,11,12
105
divwu
. 11,12,13
a2.s
122
divwu
. 20,21,22
123
divwu
20,21,22
476.d
111
194: (7d 4b 63 96|96 63 4b 7d)
divwu
r10,r11,r12
112
198: (7d 6c 6b 97|97 6b 6c 7d)
divwu
\. r11,r12,r13
a2.d
147
1dc: (7e 95 b3 97|97 b3 95 7e)
divwu
\. r20,r21,r22
148
1e0: (7e 95 b3 96|96 b3 95 7e)
divwu
r20,r21,r22
/external/valgrind/none/tests/ppc32/
jm-int.stdout.exp
56
divwu
00000000, 000f423f => 00000000 (00000000 00000000)
57
divwu
00000000, ffffffff => 00000000 (00000000 00000000)
58
divwu
000f423f, 000f423f => 00000001 (00000000 00000000)
59
divwu
000f423f, ffffffff => 00000000 (00000000 00000000)
60
divwu
ffffffff, 000f423f => 000010c6 (00000000 00000000)
61
divwu
ffffffff, ffffffff => 00000001 (00000000 00000000)
205
divwu
. 00000000, 000f423f => 00000000 (20000000 00000000)
206
divwu
. 00000000, ffffffff => 00000000 (20000000 00000000)
207
divwu
. 000f423f, 000f423f => 00000001 (40000000 00000000)
208
divwu
. 000f423f, ffffffff => 00000000 (20000000 00000000
[
all
...]
/external/llvm/test/MC/PowerPC/
ppc64-encoding.s
427
# CHECK-BE:
divwu
2, 3, 4 # encoding: [0x7c,0x43,0x23,0x96]
428
# CHECK-LE:
divwu
2, 3, 4 # encoding: [0x96,0x23,0x43,0x7c]
429
divwu
2, 3, 4
430
# CHECK-BE:
divwu
. 2, 3, 4 # encoding: [0x7c,0x43,0x23,0x97]
431
# CHECK-LE:
divwu
. 2, 3, 4 # encoding: [0x97,0x23,0x43,0x7c]
432
divwu
. 2, 3, 4
[
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...]
/toolchain/binutils/binutils-2.25/opcodes/
rl78-decode.opc
765
rl78->syntax = "
divwu
<old-encoding>"; ID(
divwu
);
774
rl78->syntax = "
divwu
"; ID(
divwu
);
[
all
...]
rl78-decode.c
[
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...]
/external/v8/src/compiler/ppc/
code-generator-ppc.cc
[
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...]
/external/valgrind/none/tests/ppc64/
jm-int.stdout.exp
56
divwu
0000000000000000, 0000001cbe991def => 0000000000000000 (00000000 00000000)
57
divwu
0000000000000000, ffffffffffffffff => 0000000000000000 (00000000 00000000)
58
divwu
0000001cbe991def, 0000001cbe991def => 0000000000000001 (00000000 00000000)
59
divwu
0000001cbe991def, ffffffffffffffff => 0000000000000000 (00000000 00000000)
60
divwu
ffffffffffffffff, 0000001cbe991def => 0000000000000001 (00000000 00000000)
61
divwu
ffffffffffffffff, ffffffffffffffff => 0000000000000001 (00000000 00000000)
285
divwu
. 0000000000000000, 0000001cbe991def => 0000000000000000 (20000000 00000000)
286
divwu
. 0000000000000000, ffffffffffffffff => 0000000000000000 (20000000 00000000)
287
divwu
. 0000001cbe991def, 0000001cbe991def => 0000000000000001 (40000000 00000000)
288
divwu
. 0000001cbe991def, ffffffffffffffff => 0000000000000000 (20000000 00000000
[
all
...]
/external/v8/src/ppc/
assembler-ppc.h
837
void
divwu
(Register dst, Register src1, Register src2, OEBit o = LeaveOE,
[
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...]
assembler-ppc.cc
937
void Assembler::
divwu
(Register dst, Register src1, Register src2, OEBit o,
function in class:v8::internal::Assembler
939
xo_form(EXT2 |
DIVWU
, dst, src1, src2, o, r);
[
all
...]
Completed in 249 milliseconds