/toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
vfpv3-32drs.s | 43 fdivd d3,d5,d6 44 fdivd d12,d18,d4 45 fdivd d18,d19,d20
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vfpv3-32drs.d | 48 0[0-9a-f]+ <[^>]+> ee853b06 (vdiv\.f64|fdivd) d3, d5, d6 49 0[0-9a-f]+ <[^>]+> ee82cb84 (vdiv\.f64|fdivd) d12, d18, d4 50 0[0-9a-f]+ <[^>]+> eec32ba4 (vdiv\.f64|fdivd) d18, d19, d20
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vfpv3-d16-bad.l | 34 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `fdivd d12,d18,d4' 35 [^:]*:[0-9]+: Error: D register out of range for selected VFP version -- `fdivd d18,d19,d20'
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vfp1.s | 26 fdivd d0, d0, d0
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vfp1_t2.s | 29 fdivd d0, d0, d0
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vfp1.d | 19 0+024 <[^>]*> ee800b00 (vdiv\.f64|fdivd) d0, d0, d0
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vfp-neon-syntax.d | 77 0[0-9a-f]+ <[^>]+> ee810b02 (vdiv\.f64|fdivd) d0, d1, d2
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vfp1_t2.d | 19 0+024 <[^>]*> ee80 0b00 (vdiv\.f64|fdivd) d0, d0, d0
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vfp-neon-syntax_t2.d | 92 0[0-9a-f]+ <[^>]+> ee81 0b02 (vdiv\.f64|fdivd) d0, d1, d2
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/m68k/ |
mcf-fpu.s | 274 fdivd %fp0,%fp0 293 fdivd %a4@,%fp0 294 fdivd %a3@+,%fp0 295 fdivd %a2@-,%fp0 296 fdivd %fp@(8),%fp0 297 fdivd %pc@(.+0x1238),%fp0
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mcf-fpu.d | 279 [ 0-9a-f]+: f200 0020 fdivd %fp0,%fp0 298 [ 0-9a-f]+: f214 5420 fdivd %a4@,%fp0 299 [ 0-9a-f]+: f21b 5420 fdivd %a3@\+,%fp0 300 [ 0-9a-f]+: f222 5420 fdivd %a2@-,%fp0 301 [ 0-9a-f]+: f22e 5420 0008 fdivd %fp@\(8\),%fp0 302 [ 0-9a-f]+: f23a 5420 1234 fdivd %pc@\(.*\),%fp0 [all...] |
/external/llvm/test/MC/Sparc/ |
sparc-fp-instructions.s | 93 ! CHECK: fdivd %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x09,0xc4] 96 fdivd %f0, %f4, %f8
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/frv/ |
allinsn.s | 2177 .global fdivd 2178 fdivd: label 2179 fdivd fr0,fr0,fr0
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allinsn.d | 1617 00000860 <fdivd>: 1618 860: 81 e8 02 40 fdivd fr0,fr0,fr0
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/external/mesa3d/src/mesa/x86/ |
assyntax.h | 709 #define FDIV_D(a) CHOICE(fdivl a, fdivl a, fdivd a) [all...] |
/art/runtime/interpreter/mterp/out/ |
mterp_arm.S | [all...] |