| /external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| SystemZMCCodeEmitter.cpp | 52 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
137 getMachineOpValue(const MCInst &MI, const MCOperand &MO,
151 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI);
152 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI);
161 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI);
162 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI);
171 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI);
172 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups, STI);
173 uint64_t Index = getMachineOpValue(MI, MI.getOperand(OpNum + 2), Fixups, STI);
182 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups, STI)
[all...] |
| /external/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| AMDGPUMCCodeEmitter.h | 35 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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| R600MCCodeEmitter.cpp | 49 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
165 uint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI,
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| SIMCCodeEmitter.cpp | 59 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
240 return getMachineOpValue(MI, MO, Fixups, STI);
243 uint64_t SIMCCodeEmitter::getMachineOpValue(const MCInst &MI,
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| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUCodeEmitter.h | 22 virtual uint64_t getMachineOpValue(const MachineInstr &MI,
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| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| PPCMCCodeEmitter.cpp | 91 /// getMachineOpValue - Return binary encoding of operand. If the machine
93 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
157 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);
169 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);
182 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);
195 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);
207 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);
221 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 16;
225 return (getMachineOpValue(MI, MO, Fixups, STI) & 0xFFFF) | RegBits;
240 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 14
[all...] |
| /external/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
| WebAssemblyMCCodeEmitter.cpp | 48 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
68 unsigned WebAssemblyMCCodeEmitter::getMachineOpValue(
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| /external/llvm/lib/Target/Sparc/MCTargetDesc/ |
| SparcMCCodeEmitter.cpp | 54 /// getMachineOpValue - Return binary encoding of operand. If the machine
56 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
105 uint64_t op = getMachineOpValue(MI, MO, Fixups, STI);
115 getMachineOpValue(const MCInst &MI, const MCOperand &MO,
147 return getMachineOpValue(MI, MO, Fixups, STI);
182 return getMachineOpValue(MI, MO, Fixups, STI);
195 return getMachineOpValue(MI, MO, Fixups, STI);
207 return getMachineOpValue(MI, MO, Fixups, STI);
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCCodeEmitter.cpp | 436 unsigned Res = getMachineOpValue(MI, MO, Fixups, STI);
642 /// getMachineOpValue - Return binary encoding of operand. If the machine
645 getMachineOpValue(const MCInst &MI, const MCOperand &MO,
671 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo),Fixups, STI) << 16;
672 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI);
715 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo),Fixups, STI) << 16;
716 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI);
727 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo),
729 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1),
741 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo)
[all...] |
| MipsMCCodeEmitter.h | 154 // getMachineOpValue - Return binary encoding of operand. If the machin
156 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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| /external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
| AMDGPUMCCodeEmitter.h | 31 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
|
| SIMCCodeEmitter.cpp | 77 /// getMachineOpValue - Reutrn the encoding for an MCOperand.
78 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
140 uint64_t SIMCCodeEmitter::getMachineOpValue(const MCInst &MI,
207 (getMachineOpValue(MI, OffsetOp, Fixup) & SMRD_OFFSET_MASK)
|
| R600MCCodeEmitter.cpp | 56 /// getMachineOpValue - Reutrn the encoding for an MCOperand.
57 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
620 uint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI,
|
| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonMCCodeEmitter.h | 35 // helper routine for getMachineOpValue()
63 unsigned getMachineOpValue(MCInst const &MI, MCOperand const &MO,
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| HexagonMCCodeEmitter.cpp | 722 HexagonMCCodeEmitter::getMachineOpValue(MCInst const &MI, MCOperand const &MO,
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| /external/llvm/lib/Target/BPF/MCTargetDesc/ |
| BPFMCCodeEmitter.cpp | 47 // getMachineOpValue - Return binary encoding of operand. If the machin
49 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
75 unsigned BPFMCCodeEmitter::getMachineOpValue(const MCInst &MI,
|
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64MCCodeEmitter.cpp | 52 /// getMachineOpValue - Return binary encoding of operand. If the machine
54 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
201 /// getMachineOpValue - Return binary encoding of operand. If the machine
204 AArch64MCCodeEmitter::getMachineOpValue(const MCInst &MI, const MCOperand &MO,
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCCodeEmitter.cpp | 72 /// getMachineOpValue - Return binary encoding of operand. If the machine
74 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
526 /// getMachineOpValue - Return binary encoding of operand. If the machine
529 getMachineOpValue(const MCInst &MI, const MCOperand &MO,
[all...] |
