/external/llvm/include/llvm/CodeGen/ |
LivePhysRegs.h | 56 LiveRegs.setUniverse(TRI->getNumRegs()); 64 LiveRegs.setUniverse(TRI->getNumRegs()); 76 assert(Reg <= TRI->getNumRegs() && "Expected a physical register."); 86 assert(Reg <= TRI->getNumRegs() && "Expected a physical register.");
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/external/mesa3d/src/gallium/drivers/radeon/ |
SIRegisterInfo.cpp | 29 BitVector Reserved(getNumRegs());
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R600RegisterInfo.cpp | 29 BitVector Reserved(getNumRegs());
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/external/llvm/lib/CodeGen/ |
RegisterClassInfo.cpp | 56 CSRNum.resize(TRI->getNumRegs(), 0); 84 unsigned NumRegs = RC->getNumRegs(); 178 unsigned NReserved = RC->getNumRegs() - getNumAllocatableRegs(RC);
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TargetFrameLoweringImpl.cpp | 70 SavedRegs.resize(TRI.getNumRegs());
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CriticalAntiDepBreaker.cpp | 35 Classes(TRI->getNumRegs(), nullptr), KillIndices(TRI->getNumRegs(), 0), 36 DefIndices(TRI->getNumRegs(), 0), KeepRegs(TRI->getNumRegs(), false) {} 43 for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i) { 103 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { 251 for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i) 451 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { 505 std::vector<unsigned> LastNewReg(TRI->getNumRegs(), 0);
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MachineRegisterInfo.cpp | 30 unsigned NumRegs = getTargetRegisterInfo()->getNumRegs(); 56 if (NewRC->getNumRegs() < MinNumRegs) 164 for (unsigned i = 1, e = getTargetRegisterInfo()->getNumRegs(); i != e; ++i) 413 assert(ReservedRegs.size() == getTargetRegisterInfo()->getNumRegs() &&
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StackMapLivenessAnalysis.cpp | 158 uint32_t *Mask = MF.allocateRegisterMask(TRI->getNumRegs());
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ExecutionDepsFix.cpp | 162 : MachineFunctionPass(ID), RC(rc), NumRegs(RC->getNumRegs()) {} 726 assert(NumRegs == RC->getNumRegs() && "Bad regclass"); 747 AliasMap.resize(TRI->getNumRegs()); 748 for (unsigned i = 0, e = RC->getNumRegs(); i != e; ++i)
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InterferenceCache.cpp | 36 if (PhysRegEntriesCount == TRI->getNumRegs()) return; 38 PhysRegEntriesCount = TRI->getNumRegs();
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TargetRegisterInfo.cpp | 54 else if (TRI && Reg < TRI->getNumRegs()) 164 BitVector Allocatable(getNumRegs());
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AggressiveAntiDepBreaker.cpp | 143 State = new AggressiveAntiDepState(TRI->getNumRegs(), BB); 197 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { 508 BitVector BV(TRI->getNumRegs(), false); 781 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { [all...] |
/external/llvm/lib/Target/NVPTX/ |
NVPTXRegisterInfo.cpp | 87 BitVector Reserved(getNumRegs());
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/external/llvm/lib/Target/AMDGPU/ |
R600RegisterInfo.cpp | 29 BitVector Reserved(getNumRegs());
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SIFrameLowering.cpp | 41 AMDGPU::SReg_128RegClass.getNumRegs()); 46 AMDGPU::SGPR_32RegClass.getNumRegs());
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/external/llvm/include/llvm/MC/ |
MCRegisterInfo.h | 54 /// getNumRegs - Return the number of registers in this class. 56 unsigned getNumRegs() const { return RegsSize; } 61 assert(i < getNumRegs() && "Register number out of range!"); 368 unsigned getNumRegs() const {
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/external/llvm/lib/MC/ |
MCRegisterInfo.cpp | 39 assert(SubReg && SubReg < getNumRegs() && "This is not a register");
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/external/llvm/lib/Target/BPF/ |
BPFRegisterInfo.cpp | 38 BitVector Reserved(getNumRegs());
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/external/llvm/lib/Target/WebAssembly/ |
WebAssemblyRegisterInfo.cpp | 47 BitVector Reserved(getNumRegs());
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/external/llvm/include/llvm/Target/ |
TargetRegisterInfo.h | 86 unsigned getNumRegs() const { return MC->getNumRegs(); } 210 return OrderFunc ? OrderFunc(MF) : makeArrayRef(begin(), getNumRegs()); 439 /// The mask is an array containing (TRI::getNumRegs()+31)/32 entries. [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430RegisterInfo.cpp | 75 BitVector Reserved(getNumRegs());
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/external/llvm/lib/Target/SystemZ/ |
SystemZRegisterInfo.cpp | 38 BitVector Reserved(getNumRegs());
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/external/llvm/lib/Target/Mips/ |
MipsDelaySlotFiller.cpp | 296 : TRI(TRI), Defs(TRI.getNumRegs(), false), Uses(TRI.getNumRegs(), false) {} 327 BitVector CallerSavedRegs(TRI.getNumRegs(), true); 363 BitVector NewDefs(TRI.getNumRegs()), NewUses(TRI.getNumRegs());
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/external/llvm/lib/Target/AArch64/ |
AArch64LoadStoreOptimizer.cpp | 904 ModifiedRegs.resize(TRI->getNumRegs()); 905 UsedRegs.resize(TRI->getNumRegs()); [all...] |
/external/llvm/lib/CodeGen/AsmPrinter/ |
DbgValueHistoryCalculator.cpp | 187 BitVector ChangingRegs(TRI->getNumRegs());
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