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  /external/llvm/lib/Target/X86/InstPrinter/
X86InstComments.cpp 40 unsigned OpReg = MI->getOperand(OperandIndex).getReg();
221 Src2Name = getRegName(MI->getOperand(2).getReg());
230 Src1Name = getRegName(MI->getOperand(1).getReg());
231 DestName = getRegName(MI->getOperand(0).getReg());
237 Src2Name = getRegName(MI->getOperand(2).getReg());
246 Src1Name = getRegName(MI->getOperand(1).getReg());
247 DestName = getRegName(MI->getOperand(0).getReg());
253 Src2Name = getRegName(MI->getOperand(2).getReg());
262 Src1Name = getRegName(MI->getOperand(1).getReg());
263 DestName = getRegName(MI->getOperand(0).getReg());
    [all...]
  /dalvik/dx/src/com/android/dx/dex/code/form/
Form23x.java 70 unsignedFitsInByte(regs.get(0).getReg()) &&
71 unsignedFitsInByte(regs.get(1).getReg()) &&
72 unsignedFitsInByte(regs.get(2).getReg());
81 bits.set(0, unsignedFitsInByte(regs.get(0).getReg()));
82 bits.set(1, unsignedFitsInByte(regs.get(1).getReg()));
83 bits.set(2, unsignedFitsInByte(regs.get(2).getReg()));
92 opcodeUnit(insn, regs.get(0).getReg()),
93 codeUnit(regs.get(1).getReg(), regs.get(2).getReg()));
Form12x.java 96 if (rs1.getReg() != regs.get(0).getReg()) {
106 return unsignedFitsInNibble(rs1.getReg()) &&
107 unsignedFitsInNibble(rs2.getReg());
115 int r0 = regs.get(0).getReg();
116 int r1 = regs.get(1).getReg();
134 bits.set(2, unsignedFitsInNibble(regs.get(2).getReg()));
158 makeByte(regs.get(sz - 2).getReg(),
159 regs.get(sz - 1).getReg())));
Form22t.java 69 unsignedFitsInNibble(regs.get(0).getReg()) &&
70 unsignedFitsInNibble(regs.get(1).getReg()))) {
84 bits.set(0, unsignedFitsInNibble(regs.get(0).getReg()));
85 bits.set(1, unsignedFitsInNibble(regs.get(1).getReg()));
106 makeByte(regs.get(0).getReg(), regs.get(1).getReg())),
Form22x.java 69 unsignedFitsInByte(regs.get(0).getReg()) &&
70 unsignedFitsInShort(regs.get(1).getReg());
79 bits.set(0, unsignedFitsInByte(regs.get(0).getReg()));
80 bits.set(1, unsignedFitsInShort(regs.get(1).getReg()));
89 opcodeUnit(insn, regs.get(0).getReg()),
90 (short) regs.get(1).getReg());
Form32x.java 68 unsignedFitsInShort(regs.get(0).getReg()) &&
69 unsignedFitsInShort(regs.get(1).getReg());
78 bits.set(0, unsignedFitsInShort(regs.get(0).getReg()));
79 bits.set(1, unsignedFitsInShort(regs.get(1).getReg()));
90 (short) regs.get(0).getReg(),
91 (short) regs.get(1).getReg());
Form21c.java 91 if (reg.getReg() != regs.get(1).getReg()) {
101 if (!unsignedFitsInByte(reg.getReg())) {
124 boolean compat = unsignedFitsInByte(regs.get(0).getReg());
129 if (regs.get(0).getReg() == regs.get(1).getReg()) {
145 opcodeUnit(insn, regs.get(0).getReg()),
Form31c.java 91 if (reg.getReg() != regs.get(1).getReg()) {
101 if (!unsignedFitsInByte(reg.getReg())) {
119 boolean compat = unsignedFitsInByte(regs.get(0).getReg());
124 if (regs.get(0).getReg() == regs.get(1).getReg()) {
139 write(out, opcodeUnit(insn, regs.get(0).getReg()), cpi);
  /external/dexmaker/src/dx/java/com/android/dx/dex/code/form/
Form23x.java 71 unsignedFitsInByte(regs.get(0).getReg()) &&
72 unsignedFitsInByte(regs.get(1).getReg()) &&
73 unsignedFitsInByte(regs.get(2).getReg());
82 bits.set(0, unsignedFitsInByte(regs.get(0).getReg()));
83 bits.set(1, unsignedFitsInByte(regs.get(1).getReg()));
84 bits.set(2, unsignedFitsInByte(regs.get(2).getReg()));
93 opcodeUnit(insn, regs.get(0).getReg()),
94 codeUnit(regs.get(1).getReg(), regs.get(2).getReg()));
Form33x.java 75 unsignedFitsInByte(regs.get(0).getReg()) &&
76 unsignedFitsInByte(regs.get(1).getReg()) &&
77 unsignedFitsInShort(regs.get(2).getReg());
86 bits.set(0, unsignedFitsInByte(regs.get(0).getReg()));
87 bits.set(1, unsignedFitsInByte(regs.get(1).getReg()));
88 bits.set(2, unsignedFitsInShort(regs.get(2).getReg()));
98 codeUnit(regs.get(0).getReg(), regs.get(1).getReg()),
99 (short) regs.get(2).getReg());
Form22t.java 70 unsignedFitsInNibble(regs.get(0).getReg()) &&
71 unsignedFitsInNibble(regs.get(1).getReg()))) {
85 bits.set(0, unsignedFitsInNibble(regs.get(0).getReg()));
86 bits.set(1, unsignedFitsInNibble(regs.get(1).getReg()));
107 makeByte(regs.get(0).getReg(), regs.get(1).getReg())),
Form22x.java 70 unsignedFitsInByte(regs.get(0).getReg()) &&
71 unsignedFitsInShort(regs.get(1).getReg());
80 bits.set(0, unsignedFitsInByte(regs.get(0).getReg()));
81 bits.set(1, unsignedFitsInShort(regs.get(1).getReg()));
90 opcodeUnit(insn, regs.get(0).getReg()),
91 (short) regs.get(1).getReg());
Form32x.java 69 unsignedFitsInShort(regs.get(0).getReg()) &&
70 unsignedFitsInShort(regs.get(1).getReg());
79 bits.set(0, unsignedFitsInShort(regs.get(0).getReg()));
80 bits.set(1, unsignedFitsInShort(regs.get(1).getReg()));
91 (short) regs.get(0).getReg(),
92 (short) regs.get(1).getReg());
Form12x.java 97 if (rs1.getReg() != regs.get(0).getReg()) {
107 return unsignedFitsInNibble(rs1.getReg()) &&
108 unsignedFitsInNibble(rs2.getReg());
117 bits.set(0, unsignedFitsInNibble(regs.get(0).getReg()));
118 bits.set(1, unsignedFitsInNibble(regs.get(1).getReg()));
135 makeByte(regs.get(sz - 2).getReg(),
136 regs.get(sz - 1).getReg())));
Form21c.java 92 if (reg.getReg() != regs.get(1).getReg()) {
102 if (!unsignedFitsInByte(reg.getReg())) {
125 boolean compat = unsignedFitsInByte(regs.get(0).getReg());
130 if (regs.get(0).getReg() == regs.get(1).getReg()) {
146 opcodeUnit(insn, regs.get(0).getReg()),
Form31c.java 92 if (reg.getReg() != regs.get(1).getReg()) {
102 if (!unsignedFitsInByte(reg.getReg())) {
120 boolean compat = unsignedFitsInByte(regs.get(0).getReg());
125 if (regs.get(0).getReg() == regs.get(1).getReg()) {
140 write(out, opcodeUnit(insn, regs.get(0).getReg()), cpi);
Form41c.java 95 if (reg.getReg() != regs.get(1).getReg()) {
105 if (!unsignedFitsInShort(reg.getReg())) {
122 boolean compat = unsignedFitsInByte(regs.get(0).getReg());
127 if (regs.get(0).getReg() == regs.get(1).getReg()) {
142 write(out, opcodeUnit(insn), cpi, (short) regs.get(0).getReg());
  /external/llvm/lib/Target/PowerPC/
PPCVSXCopy.cpp 102 if ( IsVSReg(DstMO.getReg(), MRI) &&
103 !IsVSReg(SrcMO.getReg(), MRI)) {
108 IsVRReg(SrcMO.getReg(), MRI) ? &PPC::VSHRCRegClass :
110 assert((IsF8Reg(SrcMO.getReg(), MRI) ||
111 IsVRReg(SrcMO.getReg(), MRI) ||
112 IsVSSReg(SrcMO.getReg(), MRI) ||
113 IsVSFReg(SrcMO.getReg(), MRI)) &&
122 .addImm(IsVRReg(SrcMO.getReg(), MRI) ? PPC::sub_128 :
127 } else if (!IsVSReg(DstMO.getReg(), MRI) &&
128 IsVSReg(SrcMO.getReg(), MRI))
    [all...]
PPCMIPeephole.cpp 119 unsigned TrueReg1 = lookThruCopyLike(MI.getOperand(1).getReg());
120 unsigned TrueReg2 = lookThruCopyLike(MI.getOperand(2).getReg());
131 = lookThruCopyLike(DefMI->getOperand(1).getReg());
133 = lookThruCopyLike(DefMI->getOperand(2).getReg());
141 TII->get(PPC::COPY), MI.getOperand(0).getReg())
154 MI.getOperand(1).setReg(DefMI->getOperand(1).getReg());
155 MI.getOperand(2).setReg(DefMI->getOperand(2).getReg());
166 TII->get(PPC::COPY), MI.getOperand(0).getReg())
207 CopySrcReg = MI->getOperand(1).getReg();
210 CopySrcReg = MI->getOperand(2).getReg();
    [all...]
  /dalvik/dexgen/src/com/android/dexgen/dex/code/form/
Form23x.java 69 unsignedFitsInByte(regs.get(0).getReg()) &&
70 unsignedFitsInByte(regs.get(1).getReg()) &&
71 unsignedFitsInByte(regs.get(2).getReg());
85 opcodeUnit(insn, regs.get(0).getReg()),
86 codeUnit(regs.get(1).getReg(), regs.get(2).getReg()));
Form12x.java 96 if (rs1.getReg() != regs.get(0).getReg()) {
106 return unsignedFitsInNibble(rs1.getReg()) &&
107 unsignedFitsInNibble(rs2.getReg());
129 makeByte(regs.get(sz - 2).getReg(),
130 regs.get(sz - 1).getReg())));
Form22x.java 68 unsignedFitsInByte(regs.get(0).getReg()) &&
69 unsignedFitsInShort(regs.get(1).getReg());
83 opcodeUnit(insn, regs.get(0).getReg()),
84 (short) regs.get(1).getReg());
Form32x.java 67 unsignedFitsInShort(regs.get(0).getReg()) &&
68 unsignedFitsInShort(regs.get(1).getReg());
84 (short) regs.get(0).getReg(),
85 (short) regs.get(1).getReg());
  /external/llvm/lib/Target/ARM/
ARMFeatures.h 79 return Instr->getOperand(2).getReg() != ARM::PC;
84 return Instr->getOperand(0).getReg() != ARM::PC;
86 return Instr->getOperand(0).getReg() != ARM::PC &&
87 Instr->getOperand(2).getReg() != ARM::PC;
90 return Instr->getOperand(0).getReg() != ARM::PC &&
91 Instr->getOperand(1).getReg() != ARM::PC;
  /external/llvm/lib/Target/SystemZ/
SystemZAsmPrinter.cpp 34 .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg()))
38 .addReg(SystemZMC::getRegAsGR32(MI->getOperand(0).getReg()))
39 .addReg(SystemZMC::getRegAsGR32(MI->getOperand(1).getReg()))
48 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg()))
52 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(0).getReg()))
53 .addReg(SystemZMC::getRegAsGRH32(MI->getOperand(1).getReg()))
61 .addReg(MI->getOperand(0).getReg())
62 .addReg(MI->getOperand(1).getReg())
63 .addReg(SystemZMC::getRegAsGR64(MI->getOperand(2).getReg()))
87 .addReg(SystemZMC::getRegAsVR128(MI->getOperand(0).getReg()))
    [all...]

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