| /external/ltrace/sysdeps/linux-gnu/arm/ |
| trace.c | 444 const int imm1 = SBITS(inst1, 0, 10); local
450 = ((imm1 << 12) + (imm2 << 1));
476 const unsigned imm1 = BITS(inst1, 0, 5); local
483 offset += (imm1 << 12) + (imm2 << 1);
|
| /external/v8/src/wasm/ |
| encoder.cc | 104 void WasmFunctionBuilder::EmitWithU8U8(WasmOpcode opcode, const byte imm1,
107 body_.push_back(imm1);
|
| encoder.h | 139 void EmitWithU8U8(WasmOpcode opcode, const byte imm1, const byte imm2);
|
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_peephole.cpp | 390 ImmediateValue &imm0, ImmediateValue &imm1)
392 struct Storage *const a = &imm0.reg, *const b = &imm1.reg;
559 ImmediateValue imm1; local
570 if (mul1->src(s1 = 0).getImmediate(imm1) ||
571 mul1->src(s1 = 1).getImmediate(imm1)) {
573 // a = mul r, imm1
574 // d = mul a, imm2 -> d = mul r, (imm1 * imm2)
575 mul1->setSrc(s1, bld.loadImm(NULL, f * imm1.reg.data.f32));
603 if (!insn->src(s2).mod && !insn->src(t2).getImmediate(imm1))
798 ImmediateValue imm1; local
[all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| i386-opc.h | 645 Imm1,
761 unsigned int imm1:1; member in struct:i386_operand_type::__anon75945
|
| aarch64-opc.c | 955 const simd_imm_encoding *imm1 = (const simd_imm_encoding *)i1;
958 if (imm1->imm < imm2->imm)
960 if (imm1->imm > imm2->imm)
953 const simd_imm_encoding *imm1 = (const simd_imm_encoding *)i1; local
[all...] |
| /external/vixl/test/ |
| test-simulator-a64.cc | 175 const VRegister& vd, int imm1, const VRegister& vn, int imm2);
[all...] |
| /external/pcre/dist/sljit/ |
| sljitNativeARM_32.c | 1181 sljit_uw imm1; local
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsFastISel.cpp | 174 unsigned Op0, bool Op0IsKill, uint64_t imm1,
[all...] |
| /external/valgrind/VEX/priv/ |
| host_ppc_defs.c | [all...] |
| guest_arm_toIR.c | 2606 UInt imm1 = SLICE_UInt(i0,10,10); local
[all...] |
| /toolchain/binutils/binutils-2.25/gas/config/ |
| tc-arm.c | 3195 unsigned imm1 = 0; local
[all...] |
| tc-i386.c | [all...] |
