/toolchain/binutils/binutils-2.25/gas/testsuite/gas/hppa/parse/ |
stdreg.s | 8 ldi 15,%sp 9 ldi 15,%rp 10 ldi 15,%dp 11 ldi 15,%ret0 12 ldi 15,%ret1 13 ldi 15,%arg0 14 ldi 15,%arg1 15 ldi 15,%arg2 16 ldi 15,%arg3
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/d10v/ |
instruction_packing-001.s | 4 ldi r1,0x3000 5 ldi r0, #1 8 ldi r0, #1 10 ldi r0, #1 12 ldi r0, #1 14 ldi r0, #1 16 ldi r0, #1 18 ldi r0, #1 21 ldi r0, #1 23 ldi r0, # [all...] |
instruction_packing-001.d | 9 0: e0 10 30 00 ldi.l r1, 0x3000 10 4: 26 81 40 03 jl r1 || ldi.s r0, 0x1 13 8: 2f 80 40 03 trap 0x0 || ldi.s r0, 0x1 14 c: 24 ff c0 03 bl.s 8 <L0> || ldi.s r0, 0x1 15 10: 26 01 40 03 jmp r1 || ldi.s r0, 0x1 16 14: 2f f0 40 03 stop || ldi.s r0, 0x1 17 18: 2f e0 40 03 sleep || ldi.s r0, 0x1 18 1c: 2f c0 40 03 wait || ldi.s r0, 0x1 21 20: 2f 90 40 03 dbt || ldi.s r0, 0x1 22 24: 24 7f c0 03 bra.s 20 <L1> || ldi.s r0, 0x [all...] |
instruction_packing-007.d | 9 0: e0 00 00 00 ldi.l r0, 0x0 10 4: e0 10 10 00 ldi.l r1, 0x1000 11 8: 60 22 c0 67 ldi.s r2, 0x2 -> ldi.s r3, 0x3 12 c: e0 40 40 00 ldi.l r4, 0x4000 13 10: 60 55 cc 1a ldi.s r5, 0x5 -> jmp r13
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instruction_packing-008.d | 10 0: e0 00 00 00 ldi.l r0, 0x0 11 4: e0 10 10 00 ldi.l r1, 0x1000 12 8: 60 22 c0 67 ldi.s r2, 0x2 -> ldi.s r3, 0x3 13 c: e0 40 40 00 ldi.l r4, 0x4000 14 10: 60 55 cc 1a ldi.s r5, 0x5 -> jmp r13
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instruction_packing-009.d | 10 0: e0 00 00 00 ldi.l r0, 0x0 11 4: e0 10 10 00 ldi.l r1, 0x1000 12 8: 20 22 de 00 ldi.s r2, 0x2 || nop 13 c: 20 33 de 00 ldi.s r3, 0x3 || nop 14 10: e0 40 40 00 ldi.l r4, 0x4000 15 14: 20 55 de 00 ldi.s r5, 0x5 || nop
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instruction_packing-010.d | 10 0: e0 00 00 00 ldi.l r0, 0x0 11 4: e0 10 10 00 ldi.l r1, 0x1000 12 8: 60 22 c0 67 ldi.s r2, 0x2 -> ldi.s r3, 0x3 13 c: e0 40 40 00 ldi.l r4, 0x4000 14 10: 60 55 cc 1a ldi.s r5, 0x5 -> jmp r13
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immediate-002.s | 7 ldi r0,VALUE
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immediate-003.s | 6 ldi.l r0,sym
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instruction_packing-006.d | 10 4: 20 01 de 00 ldi.s r0, 0x1 || nop 14 c: 20 01 de 00 ldi.s r0, 0x1 || nop 18 14: 20 01 de 00 ldi.s r0, 0x1 || nop 22 1c: 20 01 de 00 ldi.s r0, 0x1 || nop 26 24: 20 01 de 00 ldi.s r0, 0x1 || nop 30 2c: 20 01 de 00 ldi.s r0, 0x1 || nop 34 34: 20 01 de 00 ldi.s r0, 0x1 || nop 38 3c: 20 01 de 00 ldi.s r0, 0x1 || nop 42 44: 20 01 de 00 ldi.s r0, 0x1 || nop 46 4c: 20 01 de 00 ldi.s r0, 0x1 || nop [all...] |
immediate-006.s | 13 ldi r0,str1
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immediate-002.d | 9 0: e0 00 12 34 ldi.l r0, 0x1234
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/tic4x/ |
registers.s | 5 start: ldi R0,R0 6 ldi R0,R1 7 ldi R0,R2 8 ldi R0,R3 9 ldi R0,R4 10 ldi R0,R5 11 ldi R0,R6 12 ldi R0,R7 13 ldi R0,AR0 14 ldi R0,AR [all...] |
data.s | 12 ALIGN: ldi r0,r0 14 ldi r0,r0
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/external/llvm/test/MC/Mips/msa/ |
test_i10.s | 3 # CHECK: ldi.b $w8, 198 # encoding: [0x7b,0x06,0x32,0x07] 4 # CHECK: ldi.h $w20, 313 # encoding: [0x7b,0x29,0xcd,0x07] 5 # CHECK: ldi.w $w24, 492 # encoding: [0x7b,0x4f,0x66,0x07] 6 # CHECK: ldi.d $w27, -180 # encoding: [0x7b,0x7a,0x66,0xc7] 8 ldi.b $w8, 198 9 ldi.h $w20, 313 10 ldi.w $w24, 492 11 ldi.d $w27, -180
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/toolchain/binutils/binutils-2.25/ld/testsuite/ld-d10v/ |
linktest-002.s | 4 ldi r0,bar
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/score/ |
ldi.d | 3 #source: ldi.s 18 10: 85188006 ldi r8, 0x3\(3\) 19 14: 87388006 ldi r25, 0x3\(3\) 21 20: 84588000 ldi r2, 0x0\(0\) 22 24: 87388000 ldi r25, 0x0\(0\) 23 28: 847881fe ldi r3, 0xff\(255\) 24 2c: 86f88002 ldi r23, 0x1\(1\)
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/m32r/ |
fslot.s | 9 ldi r0,#8 12 ldi r0,#8 16 ldi r0,#8 19 ldi r0,#8 23 ldi r0,#8 27 ldi r0,#8
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fslot.d | 11 *4: 60 08 f0 00 ldi r0,[#]*8 \|\| nop 15 *c: 60 08 f0 00 ldi r0,[#]*8 \|\| nop 19 *14: 60 08 f0 00 ldi r0,[#]*8 \|\| nop 23 *1c: 60 08 f0 00 ldi r0,[#]*8 \|\| nop 27 *24: 60 08 f0 00 ldi r0,[#]*8 \|\| nop 31 *2c: 60 08 f0 00 ldi r0,[#]*8 \|\| nop
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fslotx.s | 9 ldi r0,#8 12 ldi r0,#8 16 ldi r0,#8 19 ldi r0,#8
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wrongsize.s | 7 cmpi r8,#10 -> ldi r0,#8 ; { dg-error "not a 16 bit instruction" } 8 ldi r0,#8 -> cmpi r8,#10 ; { dg-error "not a 16 bit instruction" } 9 cmpi r8,#10 || ldi r0,#8 ; { dg-error "not a 16 bit instruction" } 10 ldi r0,#8 || cmpi r8,#10 ; { dg-error "not a 16 bit instruction" }
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fslotx.d | 11 *4: 60 08 f0 00 ldi r0,[#]*8 \|\| nop 15 *c: 60 08 f0 00 ldi r0,[#]*8 \|\| nop 19 14: 60 08 f0 00 ldi r0,[#]*8 \|\| nop 23 1c: 60 08 f0 00 ldi r0,[#]*8 \|\| nop
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/toolchain/binutils/binutils-2.25/gas/testsuite/gas/z80/ |
block.s | 4 ldi
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/toolchain/binutils/binutils-2.25/ld/testsuite/ld-frv/ |
tls-dynamic-3.d | 11 [0-9a-f ]+: 92 c8 f0 0c ldi @\(gr15,12\),gr9 14 [0-9a-f ]+: 92 c8 f0 0c ldi @\(gr15,12\),gr9 16 [0-9a-f ]+: 12 c8 f0 0c ldi\.p @\(gr15,12\),gr9 19 [0-9a-f ]+: 92 c8 f0 0c ldi @\(gr15,12\),gr9 22 [0-9a-f ]+: 92 c8 f0 0c ldi @\(gr15,12\),gr9
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tls-pie-3.d | 11 [0-9a-f ]+: 92 c8 f0 0c ldi @\(gr15,12\),gr9 14 [0-9a-f ]+: 92 c8 f0 0c ldi @\(gr15,12\),gr9 16 [0-9a-f ]+: 12 c8 f0 0c ldi\.p @\(gr15,12\),gr9 19 [0-9a-f ]+: 92 c8 f0 0c ldi @\(gr15,12\),gr9 22 [0-9a-f ]+: 92 c8 f0 0c ldi @\(gr15,12\),gr9
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