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Searched
refs:lwx
(Results
1 - 15
of
15
) sorted by null
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/
octeon2.s
20
lwx
$21,$29($5)
octeon2.d
21
.*: 7cbda80a
lwx
\$21,\$29\(\$5\)
mips32-dsp.s
136
lwx
$10,$11($12)
micromips@mips32-dsp.d
137
0+01f8 <[^>]*> 016c 51a5
lwx
t2,t3\(t4\)
mips32-dsp.d
136
0+01f8 <[^>]*> 7d8b500a
lwx
t2,t3\(t4\)
mipsr6@mips32-dsp.d
137
0+01f8 <[^>]*> 7d8b500a
lwx
t2,t3\(t4\)
/toolchain/binutils/binutils-2.25/opcodes/
microblaze-opcm.h
39
bgtid, bgei, bgeid, lbu, lbur, lhu, lhur, lw, lwr,
lwx
, sb, sbr, sh,
enumerator in enum:microblaze_instr
microblaze-opc.h
233
{"
lwx
", INST_TYPE_RD_R1_R2, INST_NO_OFFSET, NO_DELAY_SLOT, IMMVAL_MASK_NON_SPECIAL, 0xC8000400, OPCODE_MASK_H4,
lwx
, memory_load_inst },
[
all
...]
mips-opc.c
[
all
...]
/external/libjpeg-turbo/simd/
jsimd_mips_dspr2.S
53
lwx
t5, t3(a2) // t5 = outptr = output_buf[ci]
56
lwx
t5, t4(t5) // t5 = outptr = output_buf[ci][output_row]
95
lwx
t5, t3(a2) // t5 = outptr = output_buf[ci]
98
lwx
t5, t4(t5) // t5 = outptr = output_buf[ci][output_row]
184
lwx
t0, t3(t0) // t0 = output_buf[0][output_row]
185
lwx
t1, t3(t1) // t1 = output_buf[1][output_row]
186
lwx
t2, t3(t2) // t2 = output_buf[2][output_row]
291
lwx
s2, s5(t0)
292
lwx
s3, s5(t1)
293
lwx
s4, s5(t2
[
all
...]
/external/llvm/test/MC/Mips/micromips-dsp/
valid.s
87
lwx
$1, $2($3) # CHECK:
lwx
$1, $2($3) # encoding: [0x00,0x43,0x09,0xa5]
/external/llvm/test/MC/Mips/dsp/
valid.s
48
lwx
$12, $22($gp) # CHECK:
lwx
$12, $22($gp) # encoding: [0x7f,0x96,0x60,0x0a]
/external/llvm/test/MC/Mips/dspr2/
valid.s
70
lwx
$12, $22($gp) # CHECK:
lwx
$12, $22($gp) # encoding: [0x7f,0x96,0x60,0x0a]
/external/llvm/test/MC/Mips/mips32r2/
invalid-dsp.s
43
lwx
$12,$12($s4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
invalid-dspr2.s
61
lwx
$12,$12($s4) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
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