| /art/compiler/optimizing/ |
| intrinsics_mips.cc | 164 Register out_lo = locations->Out().AsRegisterPairLow<Register>(); local
167 __ Mfc1(out_lo, in);
319 Register out_lo = locations->Out().AsRegisterPairLow<Register>(); local
325 __ Wsbh(out_lo, AT);
329 // use of the out_lo/out_hi wouldn't overlap with the use of
330 // in_lo/in_hi. Be very careful not to write to out_lo/out_hi
337 // __ Rotr(out_lo, in_hi, 16);
339 __ Srl(out_lo, in_hi, 16); // Here we are finally done reading
341 // write to out_lo/out_hi.
342 __ Or(out_lo, out_lo, AT)
671 Register out_lo = out; local
781 Register out_lo = locations->Out().AsRegisterPairLow<Register>(); local
1090 Register out_lo = locations->Out().AsRegisterPairLow<Register>(); local
1155 Register out_lo = locations->Out().AsRegisterPairLow<Register>(); local
1362 Register out_lo = invoke->GetLocations()->Out().AsRegisterPairLow<Register>(); local
2331 Register out_lo = locations->Out().AsRegisterPairLow<Register>(); local
2396 Register out_lo = locations->Out().AsRegisterPairLow<Register>(); local
[all...] |
| code_generator_arm.h | 232 Register out_lo, Register out_hi);
|
| code_generator_arm.cc | 2649 Register out_lo = out.AsRegisterPairLow<Register>(); local
[all...] |
| /external/libvpx/libvpx/vpx_dsp/arm/ |
| subpel_variance_neon.c | 70 const uint8x8_t out_lo = vrshrn_n_u16(b, FILTER_BITS); local
74 vst1q_u8(&output_ptr[j], vcombine_u8(out_lo, out_hi));
|
| /external/valgrind/none/tests/mips32/ |
| mips32_dspr2.c | 174 int out_lo = 0xdeadbeef; \
189 : "=&r" (out_hi), "=&r" (out_lo), "=&r" (dspCtrl) \
195 LOval, out_hi, out_lo, dspCtrl);\
[all...] |
| mips32_dsp.c | 159 int out_lo = 0xdeadbeef; \
174 : "=&r" (out_hi), "=&r" (out_lo), "=&r" (dspCtrl) \
180 out_hi, out_lo, dspCtrl); \
187 int out_lo = 0xdeadbeef; \
199 : "=&r" (out_hi), "=&r" (out_lo) \
204 0x%08x \n",instruction, RSval, RTval, HIval, LOval, out_hi, out_lo); \
[all...] |
