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  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
x86-64-suffix-bad.s 3 orw %al, (%rax)
4 orl %al, (%rax)
5 orq %al, (%rax)
7 orb %ax, (%rax)
8 orl %ax, (%rax)
9 orq %ax, (%rax)
11 orb %eax, (%rax)
12 orw %eax, (%rax)
13 orq %eax, (%rax)
15 orb %rax, (%rax
    [all...]
x86-64-vmx.s 9 vmclear (%rax)
10 vmptrld (%rax)
11 vmptrst (%rax)
12 vmxon (%rax)
13 vmread %rax,%rbx
14 vmreadq %rax,%rbx
15 vmread %rax,(%rbx)
16 vmreadq %rax,(%rbx)
17 vmwrite %rax,%rbx
18 vmwriteq %rax,%rb
    [all...]
x86-64-gidt.s 6 sidt (%rax)
7 lidt (%rax)
8 sgdt (%rax)
9 lgdt (%rax)
10 sidtq (%rax)
11 lidtq (%rax)
12 sgdtq (%rax)
13 lgdtq (%rax)
x86-64-xsave.s 7 xsave (%rax)
9 xsave (%r8, %rax)
10 xsave (%rax, %r8)
12 xsave64 (%rax)
14 xsave64 (%r8, %rax)
15 xsave64 (%rax, %r8)
16 xrstor (%rax)
18 xrstor (%r8, %rax)
19 xrstor (%rax, %r8)
21 xrstor64 (%rax)
    [all...]
x86-64-inval-seg.s 3 movq %ds,(%rax)
4 movl %ds,(%rax)
5 movq (%rax),%ds
6 movl (%rax),%ds
x86-64-branch.s 2 callq *%rax
3 call *%rax
6 callw *(%rax)
7 jmpq *%rax
8 jmp *%rax
11 jmpw *(%rax)
16 call rax
17 callq rax
20 callw [rax]
21 jmp rax
    [all...]
x86-64-fxsave.s 5 fxsave (%rax)
7 fxsave (%r8, %rax)
8 fxsave (%rax, %r8)
10 fxsave64 (%rax)
12 fxsave64 (%r8, %rax)
13 fxsave64 (%rax, %r8)
14 fxrstor (%rax)
16 fxrstor (%r8, %rax)
17 fxrstor (%rax, %r8)
19 fxrstor64 (%rax)
    [all...]
x86-64-inval-rep.s 2 rep add %rbx, %rax
3 repe add %rbx, %rax
4 repz add %rbx, %rax
5 repne add %rbx, %rax
6 repnz add %rbx, %rax
x86-64-disp32.s 2 mov (%rax),%ebx
3 mov 3(%rax),%ebx
5 mov.d8 (%rax),%ebx
6 mov.d8 3(%rax),%ebx
7 mov.d8 0xfff(%rax),%ebx
9 mov.d32 (%rax),%ebx
10 mov.d32 3(%rax),%ebx
18 mov DWORD PTR [rax], ebx
19 mov DWORD PTR [rax+3], ebx
20 mov DWORD PTR [rax+0xfff], eb
    [all...]
  /art/runtime/interpreter/mterp/x86_64/
op_const_wide.S 2 movq 2(rPC), %rax # rax <- HHHHhhhhBBBBbbbb
3 SET_WIDE_VREG %rax, rINSTq
op_const_wide_16.S 2 movswq 2(rPC), %rax # rax <- ssssBBBB
3 SET_WIDE_VREG %rax, rINSTq # store
op_int_to_long.S 2 movzbq rINSTbl, %rax # rax <- +A
5 movslq VREG_ADDRESS(%rax), %rax
6 SET_WIDE_VREG %rax, rINSTq # v[A] <- %rax
op_const_wide_32.S 2 movslq 2(rPC), %rax # eax <- ssssssssBBBBbbbb
3 SET_WIDE_VREG %rax, rINSTq # store
op_const_wide_high16.S 2 movzwq 2(rPC), %rax # eax <- 0000BBBB
3 salq $$48, %rax # eax <- BBBB0000
4 SET_WIDE_VREG %rax, rINSTq # v[AA+0] <- eax
binopWide.S 5 movzbq 2(rPC), %rax # eax <- BB
7 GET_WIDE_VREG %rax, %rax # rax <- v[BB]
8 $instr # ex: addq (rFP,%rcx,4),%rax
9 SET_WIDE_VREG %rax, rINSTq # v[AA] <- rax
  /external/llvm/test/MC/ELF/
relax-all-flag.s 14 mov %rax, %rax
x86_64-reloc-sizetest.s 6 L: movq $(L + 2147483648),%rax
  /external/llvm/test/MC/X86/
intel-syntax-unsized-memory.s 7 // CHECK: movb %al, (%rax)
8 mov [rax], al
10 // CHECK: movw %ax, (%rax)
11 mov [rax], ax
13 // CHECK: movl %eax, (%rax)
14 mov [rax], eax
16 // CHECK: movq %rax, (%rax)
17 mov [rax], rax
    [all...]
intel-syntax-invalid-basereg.s 7 lea rax, [rdi + edx]
intel-syntax-invalid-scale.s 7 lea rax, [rdi + rdx*64]
9 lea rax, [rdi + rdx*32]
11 lea rax, [rdi + rdx*16]
macho-reloc-errors-x86_64.s 3 mov %rax, thing
4 mov %rax, thing@GOT-thing2@GOT
5 mov %rax, (thing-thing2)(%rip)
6 mov %rax, thing-thing
7 mov %rax, thing-thing2
8 mov %rax, thing@PLT
10 mov %rax, thing@TLVP
  /external/strace/linux/x86_64/
get_error.c 6 * Using merely "long rax" would not work.
8 long long rax; local
12 rax = (int32_t) i386_regs.eax;
14 rax = x86_64_regs.rax;
17 if (check_errno && is_negated_errno(rax)) {
19 tcp->u_error = -rax;
21 tcp->u_rval = rax;
24 tcp->u_lrval = rax;
  /external/llvm/test/MC/COFF/
secrel-variant.s 11 movq values@SECREL32(%rax), %rcx
12 movq values@SECREL32+8(%rax), %rax
  /external/valgrind/none/tests/amd64/
loopnel.c 7 long rax = 5UL; local
8 asm volatile ("1: addq $1, %0; loopnel 1b" : "+a" (rax), "+c" (rcx) : : "cc");
9 printf ("%ld %ld\n", rax, rcx);
  /toolchain/binutils/binutils-2.25/ld/testsuite/ld-x86-64/
ilp32-8.s 4 movabs $_start,%rax
5 movabs _start,%rax

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