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  /toolchain/binutils/binutils-2.25/gas/config/
rl78-parse.y 100 #define SFR(e) if (!expr_is_sfr (e)) NOT_SFR;
143 %type <regno> regb regb_na regw regw_na FLAG sfr
188 sfr = special function register - symbol, 0xFFF00 to 0xFFFFF
272 | andor1 CY ',' sfr '.' EXPR {Bit($6)}
312 | bt_bf sfr '.' EXPR ',' '$' EXPR
393 | setclr1 sfr '.' EXPR
544 | MOV sfr ',' '#' EXPR
605 | MOV A ',' sfr
608 | MOV sfr ',' regb
615 | MOV sfr ',' opt_es EXPR {SA($5)} {NOT_ES
1128 sfr : SPL { $$ = 0xf8; } label
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  /toolchain/binutils/binutils-2.25/include/opcode/
i960.h 99 #define SFR 0x10 /* Mask for the "sfr-OK" bit */
106 #define OP(align,lit,fp,sfr) ( align | lit | fp | sfr )
109 #define RS OP( 0, 0, 0, SFR )
111 #define RSL OP( 0, LIT, 0, SFR )
127 #define SFR_OK(od) (od & SFR) /* TRUE if sfr operand allowed */
  /toolchain/binutils/binutils-2.25/opcodes/
rl78-decode.opc 155 sfr (int x)
161 #define SFR sfr (IMMU (1))
322 ID(and); DCY(); SM(None, SFR); SB(bit);
359 ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(F);
398 ID(branch_cond); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
412 ID(branch_cond_clear); SM(None, SFR); SB(bit); DC(pc+IMMS(1)+4); COND(T);
449 op0 = SFR;
686 ID(mov); DR(A); SM(None, SFR);
749 op0 = SFR;
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rl78-decode.c 156 sfr (int x) function
162 #define SFR sfr (IMMU (1))
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