| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/arm/ |
| thumbv6.s | 15 sxtb r1, r2
|
| thumbv6.d | 17 0+012 <[^>]*> b251 * sxtb r1, r2
|
| thumb32.s | 729 sxtb r0, r0
730 sxtb r0, r0, ror #0
731 sxtb r5, r0
732 sxtb r0, r5
733 sxtb.w r1, r2
734 sxtb r1, r2, ror #8
735 sxtb r1, r2, ror #16
736 sxtb r1, r2, ror #24
|
| archv6.s | 141 sxtb r2, r5
142 sxtb r2, r5, ROR #8
|
| archv6.d | 144 0+220 <[^>]*> e6af2075 ? sxtb r2, r5
145 0+224 <[^>]*> e6af2475 ? sxtb r2, r5, ror #8
|
| thumb2_bad_reg.s | 715 @ SXTB
716 sxtb r13, r0
717 sxtb r15, r0
718 sxtb r0, r13
719 sxtb r0, r15
|
| thumb32.d | [all...] |
| t16-bad.l | 25 [^:]*:43: Error: lo register required -- `sxtb r8,r0'
26 [^:]*:43: Error: lo register required -- `sxtb r0,r8'
27 [^:]*:43: Error: Thumb encoding does not support rotation -- `sxtb r0,r1,ror#8'
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/ |
| bitfield-alias.s | 66 bf_32r sxtb
67 bf_64x sxtb
|
| programmer-friendly.s | 53 adds x0, sp, x0, sxtb #0
|
| addsub.d | 33 64: 0b2180f0 add w16, w7, w1, sxtb
34 68: 0b2180f0 add w16, w7, w1, sxtb
35 6c: 0b2184f0 add w16, w7, w1, sxtb #1
36 70: 0b2188f0 add w16, w7, w1, sxtb #2
37 74: 0b218cf0 add w16, w7, w1, sxtb #3
38 78: 0b2190f0 add w16, w7, w1, sxtb #4
87 13c: 0b2183f0 add w16, wsp, w1, sxtb
88 140: 0b2183f0 add w16, wsp, w1, sxtb
89 144: 0b2187f0 add w16, wsp, w1, sxtb #1
90 148: 0b218bf0 add w16, wsp, w1, sxtb #
[all...] |
| shifted.s | 120 op3_64x \op, sxtb
129 op3_32x \op, sxtb
141 op2_64x \op, sxtb
151 op2_32x \op, sxtb
|
| shifted.d | 361 584: 8b238041 add x1, x2, w3, sxtb
362 588: 8b238441 add x1, x2, w3, sxtb #1
363 58c: 8b238841 add x1, x2, w3, sxtb #2
364 590: 8b238c41 add x1, x2, w3, sxtb #3
365 594: 8b239041 add x1, x2, w3, sxtb #4
409 644: 0b238041 add w1, w2, w3, sxtb
410 648: 0b238441 add w1, w2, w3, sxtb #1
411 64c: 0b238841 add w1, w2, w3, sxtb #2
412 650: 0b238c41 add w1, w2, w3, sxtb #3
413 654: 0b239041 add w1, w2, w3, sxtb #
[all...] |
| programmer-friendly.d | 19 28: ab2083e0 adds x0, sp, w0, sxtb
|
| /external/llvm/test/MC/ARM/ |
| thumb.s | 25 sxtb r2, r3
27 @ CHECK: sxtb r2, r3 @ encoding: [0x5a,0xb2]
|
| diagnostics.s | 312 sxtb r8, r3, #8
313 sxtb r8, r3, ror 24
314 sxtb r8, r3, ror #8 -
321 @ CHECK-ERRORS: sxtb r8, r3, #8
324 @ CHECK-ERRORS: sxtb r8, r3, ror 24
327 @ CHECK-ERRORS: sxtb r8, r3, ror #8 -
330 @ CHECK-ERRORS: sxtb r8, r3, ror #8 -
|
| basic-thumb-instructions.s | 638 @ SXTB/SXTH
640 sxtb r3, r5
643 @ CHECK: sxtb r3, r5 @ encoding: [0x6b,0xb2]
|
| basic-thumb2-instructions.s | [all...] |
| /external/llvm/test/MC/AArch64/ |
| arm64-arithmetic-encoding.s | 174 add w1, w2, w3, sxtb
183 ; CHECK: add w1, w2, w3, sxtb ; encoding: [0x41,0x80,0x23,0x0b]
191 add x1, x2, w3, sxtb
198 ; CHECK: add x1, x2, w3, sxtb ; encoding: [0x41,0x80,0x23,0x8b]
218 sub w1, w2, w3, sxtb
227 ; CHECK: sub w1, w2, w3, sxtb ; encoding: [0x41,0x80,0x23,0x4b]
235 sub x1, x2, w3, sxtb
242 ; CHECK: sub x1, x2, w3, sxtb ; encoding: [0x41,0x80,0x23,0xcb]
262 adds w1, w2, w3, sxtb
271 ; CHECK: adds w1, w2, w3, sxtb ; encoding: [0x41,0x80,0x23,0x2b
[all...] |
| basic-a64-instructions.s | 22 add x17, x25, w20, sxtb
30 // CHECK: add x17, x25, w20, sxtb // encoding: [0x31,0x83,0x34,0x8b]
40 add w2, w5, w1, sxtb
48 // CHECK: add w2, w5, w1, sxtb // encoding: [0xa2,0x80,0x21,0x0b]
54 add x2, x3, w5, sxtb #0
58 // CHECK: add x2, x3, w5, sxtb // encoding: [0x62,0x80,0x25,0x8b]
68 sub x17, x25, w20, sxtb
76 // CHECK: sub x17, x25, w20, sxtb // encoding: [0x31,0x83,0x34,0xcb]
85 sub w2, w5, w1, sxtb
93 // CHECK: sub w2, w5, w1, sxtb // encoding: [0xa2,0x80,0x21,0x4b
[all...] |
| arm64-aliases.s | 232 sxtb w1, w2
237 ; CHECK: sxtb w1, w2
242 sxtb x1, w2
249 ; CHECK: sxtb x1, w2
|
| /external/libavc/common/arm/ |
| ih264_weighted_bi_pred_a9q.s | 143 sxtb r7, r7 @sign-extend 16-bit wt1 to 32-bit
146 sxtb r9, r9 @sign-extend 8-bit ofst1 to 32-bit
154 sxtb r8, r8 @sign-extend 16-bit wt2 to 32-bit
157 sxtb r10, r10 @sign-extend 8-bit ofst2 to 32-bit
471 sxtb r9, r9 @sign-extend 8-bit ofst1_u to 32-bit
472 sxtb r10, r10 @sign-extend 8-bit ofst2_u to 32-bit
473 sxtb r7, r7 @sign-extend 8-bit ofst1_v to 32-bit
474 sxtb r8, r8 @sign-extend 8-bit ofst2_v to 32-bit
|
| /external/valgrind/none/tests/arm64/ |
| integer.stdout.exp | [all...] |
| /external/v8/test/cctest/ |
| test-disasm-arm.cc | 407 COMPARE(sxtb(r1, r7, 0, eq), "06af1077 sxtbeq r1, r7");
408 COMPARE(sxtb(r0, r0, 8, ne), "16af0470 sxtbne r0, r0, ror #8");
409 COMPARE(sxtb(r9, r10, 16), "e6af987a sxtb r9, r10, ror #16");
410 COMPARE(sxtb(r4, r3, 24), "e6af4c73 sxtb r4, r3, ror #24");
[all...] |
| /external/v8/src/arm/ |
| disasm-arm.cc | [all...] |
