| /external/llvm/test/MC/AArch64/ |
| neon-across.s | 57 umaxv b0, v1.8b
58 umaxv b0, v1.16b
59 umaxv h0, v1.4h
60 umaxv h0, v1.8h
61 umaxv s0, v1.4s
63 // CHECK: umaxv b0, v1.8b // encoding: [0x20,0xa8,0x30,0x2e]
64 // CHECK: umaxv b0, v1.16b // encoding: [0x20,0xa8,0x30,0x6e]
65 // CHECK: umaxv h0, v1.4h // encoding: [0x20,0xa8,0x70,0x2e]
66 // CHECK: umaxv h0, v1.8h // encoding: [0x20,0xa8,0x70,0x6e]
67 // CHECK: umaxv s0, v1.4s // encoding: [0x20,0xa8,0xb0,0x6e
[all...] |
| neon-diagnostics.s | [all...] |
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/aarch64/ |
| advsimd-across.d | 23 3c: 2e30abe7 umaxv b7, v31.8b
24 40: 6e30abe7 umaxv b7, v31.16b
25 44: 2e70abe7 umaxv h7, v31.4h
26 48: 6e70abe7 umaxv h7, v31.8h
27 4c: 6eb0abe7 umaxv s7, v31.4s
|
| advsimd-across.s | 36 .irp op, smaxv, umaxv, sminv, uminv, addv
|
| /external/opencv3/modules/core/test/ocl/ |
| test_arithm.cpp | 1161 double minv, maxv, uminv, umaxv; local
1166 OCL_ON(cv::minMaxIdx(usrc2_roi, &uminv, &umaxv));
1169 EXPECT_DOUBLE_EQ(maxv, umaxv);
1174 OCL_ON(cv::minMaxIdx(usrc2_roi, &uminv, &umaxv, up1, up2, noArray()));
1177 EXPECT_DOUBLE_EQ(maxv, umaxv);
1197 double minv, maxv, uminv, umaxv; local
1200 OCL_ON(cv::minMaxIdx(usrc2_roi, &uminv, &umaxv, up1, up2, umask_roi));
1203 EXPECT_DOUBLE_EQ(maxv, umaxv);
[all...] |
| /external/vixl/src/vixl/a64/ |
| simulator-a64.h | [all...] |
| assembler-a64.h | [all...] |
| macro-assembler-a64.h | [all...] |
| simulator-a64.cc | [all...] |
| assembler-a64.cc | [all...] |
| logic-a64.cc | 1589 LogicVRegister Simulator::umaxv(VectorFormat vform, function in class:vixl::Simulator
[all...] |
| /external/vixl/test/ |
| test-simulator-a64.cc | [all...] |
