/external/libgdx/extensions/gdx-bullet/jni/src/bullet/BulletDynamics/ConstraintSolver/ |
btSolverBody.h | 46 SIMD_FORCE_INLINE btSimdScalar(__m128 v128) 47 :m_vec128(v128) 67 SIMD_FORCE_INLINE void set128(__m128 v128) 69 m_vec128 = v128;
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/external/libunwind_llvm/src/ |
Registers.hpp | 26 struct v128 { uint32_t vec[4]; }; struct in namespace:libunwind 43 v128 getVectorRegister(int num) const; 44 void setVectorRegister(int num, v128 value); 208 inline v128 Registers_x86::getVectorRegister(int) const { 212 inline void Registers_x86::setVectorRegister(int, v128) { 231 v128 getVectorRegister(int num) const; 232 void setVectorRegister(int num, v128 value); 456 inline v128 Registers_x86_64::getVectorRegister(int) const { 460 inline void Registers_x86_64::setVectorRegister(int, v128) { 479 v128 getVectorRegister(int num) const [all...] |
AddressSpace.hpp | 139 v128 getVector(pint_t addr) { 140 v128 val;
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DwarfInstructions.hpp | 63 static v128 getSavedVectorRegister(A &addressSpace, const R ®isters, 132 v128 DwarfInstructions<A, R>::getSavedVectorRegister(
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/ndk/sources/cxx-stl/llvm-libc++abi/libcxxabi/src/Unwind/ |
Registers.hpp | 26 struct v128 { uint32_t vec[4]; }; struct in namespace:libunwind 43 v128 getVectorRegister(int num) const; 44 void setVectorRegister(int num, v128 value); 208 inline v128 Registers_x86::getVectorRegister(int) const { 212 inline void Registers_x86::setVectorRegister(int, v128) { 231 v128 getVectorRegister(int num) const; 232 void setVectorRegister(int num, v128 value); 456 inline v128 Registers_x86_64::getVectorRegister(int) const { 460 inline void Registers_x86_64::setVectorRegister(int, v128) { 479 v128 getVectorRegister(int num) const [all...] |
AddressSpace.hpp | 132 v128 getVector(pint_t addr) { 133 v128 val;
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DwarfInstructions.hpp | 63 static v128 getSavedVectorRegister(A &addressSpace, const R ®isters, 132 v128 DwarfInstructions<A, R>::getSavedVectorRegister(
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/external/libgdx/extensions/gdx-bullet/jni/src/bullet/LinearMath/ |
btQuadWord.h | 64 SIMD_FORCE_INLINE void set128(btSimdFloat4 v128) 66 mVec128 = v128;
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btVector3.h | 107 SIMD_FORCE_INLINE void set128(btSimdFloat4 v128) 109 mVec128 = v128; [all...] |
/cts/tests/tests/renderscript/src/android/renderscript/cts/ |
small_structs.rs | 235 MAKE_TWO_ELEMENT_STRUCT_TEST(v128, float4)
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/external/llvm/test/Bindings/OCaml/ |
target.ml | 44 let layout = "e-p:32:32-f64:32:64-v64:32:64-v128:32:128-n32-S32" in
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/ndk/tests/device/test-stlport_shared-exception/jni/ |
pr29166.cpp | 30 register int v121=OFF+121,v122=OFF+122,v123=OFF+123,v124=OFF+124,v125=OFF+125,v126=OFF+126,v127=OFF+127,v128=OFF+128,v129=OFF+129,v130=OFF+130; local 61 sum +=v121+v122+v123+v124+v125+v126+v127+v128+v129+v130; 104 register int v121=OFF+121,v122=OFF+122,v123=OFF+123,v124=OFF+124,v125=OFF+125,v126=OFF+126,v127=OFF+127,v128=OFF+128,v129=OFF+129,v130=OFF+130; local 138 sum +=v121+v122+v123+v124+v125+v126+v127+v128+v129+v130; 175 sum +=v121+v122+v123+v124+v125+v126+v127+v128+v129+v130;
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/ndk/tests/device/test-stlport_static-exception/jni/ |
pr29166.cpp | 30 register int v121=OFF+121,v122=OFF+122,v123=OFF+123,v124=OFF+124,v125=OFF+125,v126=OFF+126,v127=OFF+127,v128=OFF+128,v129=OFF+129,v130=OFF+130; local 61 sum +=v121+v122+v123+v124+v125+v126+v127+v128+v129+v130; 104 register int v121=OFF+121,v122=OFF+122,v123=OFF+123,v124=OFF+124,v125=OFF+125,v126=OFF+126,v127=OFF+127,v128=OFF+128,v129=OFF+129,v130=OFF+130; local 138 sum +=v121+v122+v123+v124+v125+v126+v127+v128+v129+v130; 175 sum +=v121+v122+v123+v124+v125+v126+v127+v128+v129+v130;
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/external/valgrind/VEX/priv/ |
ir_opt.c | 1639 UShort v128 = e->Iex.Unop.arg->Iex.Const.con->Ico.V128; local 1648 UShort v128 = e->Iex.Unop.arg->Iex.Const.con->Ico.V128; local 1681 UShort v128 = e->Iex.Unop.arg->Iex.Const.con->Ico.V128; local [all...] |
guest_amd64_toIR.c | [all...] |