/external/libhevc/common/arm64/ |
ihevc_intra_pred_chroma_ver.s | 121 ld2 {v22.8b, v23.8b}, [x6] //16 loads (col 16:31) 132 st2 {v22.8b, v23.8b}, [x2], x11 133 st2 {v22.8b, v23.8b}, [x5], x11 134 st2 {v22.8b, v23.8b}, [x8], x11 135 st2 {v22.8b, v23.8b}, [x10], x11 145 st2 {v22.8b, v23.8b}, [x2], x11 146 st2 {v22.8b, v23.8b}, [x5], x11 147 st2 {v22.8b, v23.8b}, [x8], x11 148 st2 {v22.8b, v23.8b}, [x10], x11 158 st2 {v22.8b, v23.8b}, [x2], x1 [all...] |
ihevc_intra_pred_luma_vert.s | 122 ld1 {v22.8b, v23.8b}, [x6] //16 loads (col 16:31) 131 st1 {v22.8b, v23.8b}, [x2], x11 132 st1 {v22.8b, v23.8b}, [x5], x11 133 st1 {v22.8b, v23.8b}, [x8], x11 134 st1 {v22.8b, v23.8b}, [x10], x11 144 st1 {v22.8b, v23.8b}, [x2], x11 145 st1 {v22.8b, v23.8b}, [x5], x11 146 st1 {v22.8b, v23.8b}, [x8], x11 147 st1 {v22.8b, v23.8b}, [x10], x11 156 st1 {v22.8b, v23.8b}, [x2], x1 [all...] |
ihevc_intra_pred_chroma_mode_3_to_9.s | 213 tbl v23.8b, { v0.16b, v1.16b}, v5.8b //load from ref_main_idx + 1 (row 3) 222 umlal v18.8h, v23.8b, v6.8b //mul (row 3) 259 tbl v23.8b, { v0.16b, v1.16b}, v5.8b //load from ref_main_idx + 1 (row 7) 261 umlal v18.8h, v23.8b, v6.8b //mul (row 7) 298 sqxtn v23.8b, v25.8h 299 shl v23.8b, v23.8b,#1 311 sub v23.8b, v23.8b , v27.8b //ref_main_idx (sub row) 315 sub v2.8b, v26.8b , v23.8b //ref_main_id [all...] |
ihevc_inter_pred_filters_luma_vert_w16inp.s | 129 dup v23.4h, v0.h[1] //coeffabs_1 = vdup_lane_u8(coeffabs, 1)// 155 smull v19.4s, v1.4h, v23.4h //mul_res1 = vmull_u8(src_tmp2, coeffabs_1)// 171 smull v20.4s, v2.4h, v23.4h //mul_res2 = vmull_u8(src_tmp3, coeffabs_1)// 188 smull v21.4s, v3.4h, v23.4h 202 smull v30.4s, v4.4h, v23.4h 229 smull v19.4s, v1.4h, v23.4h //mul_res1 = vmull_u8(src_tmp2, coeffabs_1)// 246 smull v20.4s, v2.4h, v23.4h //mul_res2 = vmull_u8(src_tmp3, coeffabs_1)// 262 smull v21.4s, v3.4h, v23.4h 289 smull v30.4s, v4.4h, v23.4h 316 smull v19.4s, v1.4h, v23.4h //mul_res1 = vmull_u8(src_tmp2, coeffabs_1)/ [all...] |
ihevc_inter_pred_luma_vert_w16inp_w16out.s | 138 dup v23.4h,v0.h[1] //coeffabs_1 = vdup_lane_u8(coeffabs, 1)// 166 smull v19.4s,v1.4h,v23.4h //mul_res1 = smull_u8(src_tmp2, coeffabs_1)// 182 smull v20.4s,v2.4h,v23.4h //mul_res2 = smull_u8(src_tmp3, coeffabs_1)// 199 smull v21.4s,v3.4h,v23.4h 214 smull v31.4s,v4.4h,v23.4h 243 smull v19.4s,v1.4h,v23.4h //mul_res1 = smull_u8(src_tmp2, coeffabs_1)// 261 smull v20.4s,v2.4h,v23.4h //mul_res2 = smull_u8(src_tmp3, coeffabs_1)// 278 smull v21.4s,v3.4h,v23.4h 306 smull v31.4s,v4.4h,v23.4h 334 smull v19.4s,v1.4h,v23.4h //mul_res1 = smull_u8(src_tmp2, coeffabs_1)/ [all...] |
ihevc_intra_pred_filters_chroma_mode_19_to_25.s | 281 umull v23.8h, v7.8b, v30.8b //(i row)vmull_u8(ref_main_idx, dup_const_32_fract) 284 umlal v23.8h, v19.8b, v31.8b //(i row)vmull_u8(ref_main_idx_1, dup_const_fract) 298 rshrn v23.8b, v23.8h,#5 //(i row)shift_res = vrshrn_n_u16(add_res, 5) 312 st1 {v23.8b},[x2],#8 //(i row) 339 umull v23.8h, v7.8b, v30.8b //(v)vmull_u8(ref_main_idx, dup_const_32_fract) 342 umlal v23.8h, v19.8b, v31.8b //(v)vmull_u8(ref_main_idx_1, dup_const_fract) 364 rshrn v23.8b, v23.8h,#5 //(v)shift_res = vrshrn_n_u16(add_res, 5) 378 st1 {v23.8b},[x0],x3 //(v [all...] |
ihevc_sao_edge_offset_class1_chroma.s | 220 //TBL v23.8b, {v6.16b},v23.8b //II vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx)) 222 mov v23.d[0], v22.d[1] 223 UZP1 v27.8b, v22.8b, v23.8b 224 UZP2 v23.8b, v22.8b, v23.8b 235 TBL v25.8b, {v1.16b},v23.8b 281 //TBL v23.8b, {v6.16b},v23.8b //vtbl1_s8(edge_idx_tbl, vget_high_s8(edge_idx)) 283 mov v23.d[0],v22.d[1 [all...] |
/external/llvm/test/MC/Hexagon/ |
v60-permute.s | 8 #CHECK: 1fd7d7a2 { v2.ub = vpack(v23.h{{ *}},{{ *}}v23.h):sat } 9 v2.ub=vpack(v23.h,v23.h):sat 29 #CHECK: 1e01d256 { v23:22.h = vunpack(v18.b) } 30 v23:22.h=vunpack(v18.b) 38 #CHECK: 1e01d778 { v25:24.w = vunpack(v23.h) } 39 v25:24.w=vunpack(v23.h)
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v60-vmpy1.s | 20 #CHECK: 1908da97 { v23.w = vrmpy(v26.ub,{{ *}}r8.b) } 21 v23.w=vrmpy(v26.ub,r8.b) 71 #CHECK: 1946de76 { v23:22.uw = vmpy(v30.uh,{{ *}}r6.uh) } 72 v23:22.uw=vmpy(v30.uh,r6.uh) 80 #CHECK: 1c34d937 { v23.h = vmpy(v25.h,{{ *}}v20.h):<<1:rnd:sat } 81 v23.h=vmpy(v25.h,v20.h):<<1:rnd:sat 98 #CHECK: 1c16d77c { v28.w = vdmpy(v23.h,{{ *}}v22.h):sat } 99 v28.w=vdmpy(v23.h,v22.h):sat 131 #CHECK: 1ff7cbfa { v26.w = vmpyo(v11.w{{ *}},{{ *}}v23.h):<<1:sat } 132 v26.w=vmpyo(v11.w,v23.h):<<1:sa [all...] |
v60-vcmp.s | 44 #CHECK: 1c9bf795 { q1 ^= vcmp.gt(v23.h{{ *}},{{ *}}v27.h) } 45 q1^=vcmp.gt(v23.h,v27.h) 77 #CHECK: 1c91f75a { q2 |= vcmp.gt(v23.w{{ *}},{{ *}}v17.w) } 78 q2|=vcmp.gt(v23.w,v17.w)
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/hardware/intel/common/omx-components/videocodec/libvpx_internal/libvpx/vp8/common/ppc/ |
variance_subpixel_altivec.asm | 74 ;# v23 tmp 110 vmuloub v23, \P0, v20 111 vadduhm v23, v18, v23 116 vadduhm v23, v23, v25 ;# Ro = odds 119 vsrh v23, v23, v19 ;# v16 v17 = evens, odds 120 vmrghh \P0, v22, v23 ;# v18 v19 = 16-bit result in order 121 vmrglh v23, v22, v2 [all...] |
platform_altivec.asm | 31 W v23, r3 49 R v23, r3
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filter_bilinear_altivec.asm | 71 ;# v23 tmp 134 vmuloub v23, \P0, v20 135 vadduhm v23, v18, v23 140 vadduhm v23, v23, v25 ;# Ro = odds 143 vsrh v23, v23, v19 ;# v16 v17 = evens, odds 144 vmrghh \P0, v22, v23 ;# v18 v19 = 16-bit result in order 145 vmrglh v23, v22, v2 [all...] |
/external/libavc/common/armv8/ |
ih264_resi_trans_quant_av8.s | 168 shl v23.4h, v21.4h, #1 //u_shift(x3,1,shft) 174 add v25.4h, v23.4h , v20.4h //x6 = u_shift(x3,1,shft) + x2; 177 dup v23.4s, w8 //load round factor values 198 add v20.4s, v0.4s, v23.4s 199 add v21.4s, v1.4s, v23.4s 200 add v22.4s, v2.4s, v23.4s 201 add v23.4s, v3.4s, v23.4s 208 sshl v23.4s, v23.4s, v24.4s //shift row [all...] |
ih264_inter_pred_filters_luma_horz_av8.s | 176 sqrshrun v23.8b, v14.8h, #5 //// (a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 + 16) >> 5 (column1,row1) 185 st1 {v23.8b, v24.8b}, [x1], x3 ////Store dest row1 229 sqrshrun v23.8b, v14.8h, #5 //// (a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 + 16) >> 5 (column1,row3) 237 st1 {v23.8b, v24.8b}, [x1], x3 ////Store dest row3 281 sqrshrun v23.8b, v14.8h, #5 //// (a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 + 16) >> 5 (column1,row5) 291 st1 {v23.8b, v24.8b}, [x1], x3 ////Store dest row5 331 sqrshrun v23.8b, v14.8h, #5 //// (a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 + 16) >> 5 (column1,row7) 335 st1 {v23.8b, v24.8b}, [x1], x3 ////Store dest row7 355 ext v23.8b, v5.8b , v6.8b, #1 ////extract a[1] (column1,row1) 361 umlsl v14.8h, v23.8b, v0.8b //// a0 + a5 + 20a2 + 20a3 - 5a1 (column1,row1 [all...] |
ih264_iquant_itrans_recon_av8.s | 135 ld4 {v20.4h - v23.4h}, [x5] // load pu2_iscal_mat[i], i =0..15 143 mul v23.4h, v23.4h, v29.4h // x[i]=(scale[i] * dequant[i]) where i = 12..14 148 smull v6.4s, v19.4h, v23.4h // q3 = p[i] = (x[i] * trns_coeff[i]) where i = 12..15 214 sub v23.4h, v14.4h, v17.4h // x0 - x3 217 mov v22.d[1], v23.d[0] 326 ld4 {v20.4h - v23.4h}, [x5] // load pu2_iscal_mat[i], i =0..15 334 mul v23.4h, v23.4h, v29.4h // x[i]=(scale[i] * dequant[i]) where i = 12..14 339 smull v6.4s, v19.4h, v23.4h // q3 = p[i] = (x[i] * trns_coeff[i]) where i = 12..1 [all...] |
ih264_inter_pred_luma_horz_hpel_vert_hpel_av8.s | 129 ext v23.16b, v18.16b , v20.16b , #10 135 saddl v26.4s, v18.4h, v23.4h 139 saddl2 v23.4s, v18.8h, v23.8h 140 smlal2 v23.4s, v0.8h, v28.8h 141 smlsl2 v23.4s, v24.8h, v30.8h 144 sqrshrun v19.4h, v23.4s, #10 210 ext v23.16b, v18.16b , v20.16b , #10 216 saddl v26.4s, v18.4h, v23.4h 220 saddl2 v23.4s, v18.8h, v23.8 [all...] |
ih264_intra_pred_luma_16x16_av8.s | 223 dup v23.16b, v0.b[2] 229 st1 {v23.16b}, [x1], x3 528 sqrshrun v23.8b, v28.8h, #5 532 st1 {v22.2s, v23.2s}, [x2], x3 538 sqrshrun v23.8b, v28.8h, #5 542 st1 {v22.2s, v23.2s}, [x2], x3 548 sqrshrun v23.8b, v28.8h, #5 552 st1 {v22.2s, v23.2s}, [x2], x3 558 sqrshrun v23.8b, v28.8h, #5 562 st1 {v22.2s, v23.2s}, [x2], x [all...] |
/external/libavc/encoder/armv8/ |
ih264e_half_pel_av8.s | 175 sqrshrun v23.8b, v14.8h, #5 //// (a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 + 16) >> 5 (column1,row1) 181 st1 {v23.8b, v24.8b}, [x1], #16 ////Store dest row1 317 mov v23.d[0], v22.d[1] 334 ext v31.8b, v22.8b , v23.8b , #2 350 ext v31.8b, v23.8b , v24.8b , #2 359 ext v30.8b, v22.8b , v23.8b , #4 360 ext v29.8b, v22.8b , v23.8b , #6 363 ext v28.8b, v22.8b , v23.8b , #2 367 smlsl v2.4s, v23.4h, v0.h[0] //// a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 (set3) 371 ext v30.8b, v23.8b , v24.8b , # [all...] |
/cts/tests/tests/jni/src/android/jni/cts/ |
InstanceFromNative.java | 87 int v20, int v21, int v22, int v23, int v24, 100 (v20 == 20) && (v21 == 21) && (v22 == 22) && (v23 == 23) &&
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StaticFromNative.java | 84 int v20, int v21, int v22, int v23, int v24, 97 (v20 == 20) && (v21 == 21) && (v22 == 22) && (v23 == 23) &&
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/external/llvm/test/MC/AArch64/ |
neon-scalar-by-elem-mla.s | 29 fmls s5, s12, v23.s[2] 37 // CHECK: fmls s5, s12, v23.s[2] // encoding: [0x85,0x59,0x97,0x5f]
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/frameworks/rs/cpu_ref/ |
rsCpuIntrinsics_advsimd_3DLUT.S | 134 1: st4 {v20.8b,v21.8b,v22.8b,v23.8b}, [x0], #32 207 mov v23.8b, v3.8b 214 st4 {v20.8b,v21.8b,v22.8b,v23.8b}, [x0], #32 233 st4 {v20.b-v23.b}[0], [x0], #4 234 st4 {v20.b-v23.b}[1], [x0], #4 235 st4 {v20.b-v23.b}[2], [x0], #4 236 st4 {v20.b-v23.b}[3], [x0], #4 239 st4 {v20.b-v23.b}[4], [x0], #4 240 st4 {v20.b-v23.b}[5], [x0], #4 243 st4 {v20.b-v23.b}[6], [x0], # [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/ppc/ |
altivec.d | 21 2c: (7e e0 40 8e|8e 40 e0 7e) lvewx v23,0,r8 37 6c: (7e e0 a1 4e|4e a1 e0 7e) stvehx v23,0,r20 54 b0: (12 ed 22 80|80 22 ed 12) vadduws v23,v13,v4 58 c0: (12 fc 9d 42|42 9d fc 12) vavgsh v23,v28,v19 62 d0: (10 77 ec 82|82 ec 77 10) vavguw v3,v23,v29 70 f0: (12 ed 6c c6|c6 6c ed 12) vcmpeqfp\. v23,v13,v13 77 10c: (12 f1 81 c6|c6 81 f1 12) vcmpgefp v23,v17,v16 95 154: (13 8e bb 8a|8a bb 8e 13) vctuxs v28,v23,14 99 164: (12 f2 91 6e|6e 91 f2 12) vmaddfp v23,v18,v5,v18 101 16c: (11 17 71 02|02 71 17 11) vmaxsb v8,v23,v1 [all...] |
/external/libhevc/decoder/arm64/ |
ihevcd_fmt_conv_420sp_to_rgba8888.s | 242 movi v23.8b, #0 254 ZIP1 v27.8b, v22.8b, v23.8b 255 ZIP2 v23.8b, v22.8b, v23.8b 261 mov v22.d[1], v23.d[0] 308 movi v23.8b, #0 320 ZIP1 v27.8b, v22.8b, v23.8b 321 ZIP2 v23.8b, v22.8b, v23.8b 327 mov v22.d[1], v23.d[0 [all...] |