| /external/clang/test/CodeGen/ |
| builtins-mips.c | 10 typedef signed char v4i8 __attribute__ ((vector_size(4))); typedef
19 v4i8 v4i8_r, v4i8_a, v4i8_b, v4i8_c;
27 v4i8_a = (v4i8) {1, 2, 3, 0xFF};
28 v4i8_b = (v4i8) {2, 4, 6, 8};
91 v4i8_a = (v4i8) {1, 2, 3, 4};
124 v4i8_a = (v4i8) {0x12, 0x34, 0x56, 0x78};
142 v4i8_a = (v4i8) {1, 2, 3, 4};
145 v4i8_a = (v4i8) {128, 64, 32, 16};
168 v4i8_a = (v4i8) {0x1, 0x3, 0x5, 0x7};
211 v4i8_b = (v4i8) {1, 2, 3, 4}
[all...] |
| systemz-abi-vector.c | 15 typedef __attribute__((vector_size(4))) char v4i8; typedef
50 v4i8 pass_v4i8(v4i8 arg) { return arg; }
143 struct agg_v4i8 { v4i8 a; };
166 struct agg_novector1 { v4i8 a; v4i8 b; };
171 struct agg_novector2 { v4i8 a; float b; };
176 struct agg_novector3 { v4i8 a; int : 0; };
181 struct agg_novector4 { v4i8 a __attribute__((aligned (8))); };
253 v4i8 va_v4i8(__builtin_va_list l) { return __builtin_va_arg(l, v4i8);
[all...] |
| /bionic/libc/arch-mips/string/ |
| mips-string-ops.h | 98 typedef signed char v4i8 __attribute__ ((vector_size (4))); typedef
101 ((unsigned) __builtin_mips_subu_s_qb((v4i8) __01s,(v4i8) __x))
|
| /external/llvm/include/llvm/CodeGen/ |
| MachineValueType.h | 70 v4i8 = 23, // 4 x i8 enumerator in enum:llvm::MVT::SimpleValueType
227 return (SimpleTy == MVT::v4i8 || SimpleTy == MVT::v2i16 ||
320 case v4i8:
397 case v4i8:
455 case v4i8:
598 if (NumElements == 4) return MVT::v4i8;
|
| /external/llvm/lib/Target/X86/ |
| X86TargetTransformInfo.cpp | 594 { ISD::UINT_TO_FP, MVT::v4f64, MVT::v4i8, 2 },
621 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i8, 3 },
622 { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i8, 3 },
628 { ISD::TRUNCATE, MVT::v4i8, MVT::v4i64, 2 },
652 { ISD::SIGN_EXTEND, MVT::v4i64, MVT::v4i8, 6 },
653 { ISD::ZERO_EXTEND, MVT::v4i64, MVT::v4i8, 4 },
659 { ISD::TRUNCATE, MVT::v4i8, MVT::v4i64, 4 },
672 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i8, 3 },
676 { ISD::SINT_TO_FP, MVT::v4f64, MVT::v4i8, 3 },
685 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8, 2 }
[all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64TargetTransformInfo.cpp | 231 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i8, 4 },
233 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8, 3 },
273 { ISD::FP_TO_SINT, MVT::v4i8, MVT::v4f32, 2 },
275 { ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f32, 2 },
|
| AArch64ISelLowering.cpp | 566 setOperationAction(ISD::UINT_TO_FP, MVT::v4i8, Promote);
567 setOperationAction(ISD::SINT_TO_FP, MVT::v4i8, Promote);
[all...] |
| /external/llvm/lib/IR/ |
| ValueTypes.cpp | 150 case MVT::v4i8: return "v4i8";
228 case MVT::v4i8: return VectorType::get(Type::getInt8Ty(Context), 4);
|
| /external/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 114 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i8, 3 },
115 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i8, 3 },
129 { ISD::FP_TO_SINT, MVT::v4i8, MVT::v4f32, 3 },
130 { ISD::FP_TO_UINT, MVT::v4i8, MVT::v4f32, 3 },
|
| ARMISelLowering.cpp | 630 // It is legal to extload from v4i8 to v4i16 or v4i32.
631 for (MVT Ty : {MVT::v8i8, MVT::v4i8, MVT::v2i8, MVT::v4i16, MVT::v2i16,
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDILISelLowering.cpp | 58 (int)MVT::v4i8,
86 (int)MVT::v4i8,
208 setOperationAction(ISD::UDIV, MVT::v4i8, Expand);
650 } else if (OVT == MVT::v4i8) {
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 239 } else if (LocVT == MVT::v4i8 || LocVT == MVT::v2i16) {
403 } else if (LocVT == MVT::v4i8 || LocVT == MVT::v2i16) {
[all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenTarget.cpp | 83 case MVT::v4i8: return "MVT::v4i8";
|
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 60 MVT::SimpleValueType VecTys[2] = {MVT::v2i16, MVT::v4i8};
878 if ((Ty != MVT::v2i16) && (Ty != MVT::v4i8))
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.cpp | 137 setTruncStoreAction(MVT::v4i32, MVT::v4i8, Custom);
194 setLoadExtAction(ISD::EXTLOAD, VT, MVT::v4i8, Expand);
195 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::v4i8, Expand);
196 setLoadExtAction(ISD::ZEXTLOAD, VT, MVT::v4i8, Expand);
[all...] |
| R600ISelLowering.cpp | 112 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v4i8, Expand);
[all...] |
| SIISelLowering.cpp | 118 setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v4i8, Custom);
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXISelLowering.cpp | 64 case MVT::v4i8:
[all...] |
