| /external/llvm/include/llvm/CodeGen/ |
| MachineValueType.h | 98 v8i64 = 48, // 8 x i64 enumerator in enum:llvm::MVT::SimpleValueType
260 SimpleTy == MVT::v8i64);
345 case v8i64:
392 case v8i64:
493 case v8i64:
629 if (NumElements == 8) return MVT::v8i64;
|
| /external/llvm/lib/Target/X86/ |
| X86TargetTransformInfo.cpp | 138 { ISD::SHL, MVT::v8i64, 1 },
139 { ISD::SRL, MVT::v8i64, 1 },
140 { ISD::SRA, MVT::v8i64, 1 },
537 { ISD::UINT_TO_FP, MVT::v8f64, MVT::v8i64, 1 },
540 { ISD::UINT_TO_FP, MVT::v8f32, MVT::v8i64, 1 },
544 { ISD::FP_TO_UINT, MVT::v8i64, MVT::v8f64, 1 },
547 { ISD::FP_TO_UINT, MVT::v8i64, MVT::v8f32, 1 },
557 { ISD::TRUNCATE, MVT::v8i16, MVT::v8i64, 1 },
558 { ISD::TRUNCATE, MVT::v8i32, MVT::v8i64, 1 },
568 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i32, 1 }
[all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64TargetTransformInfo.cpp | 205 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i8, 7 },
206 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i8, 7 },
207 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i16, 6 },
208 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i16, 6 },
395 { ISD::SELECT, MVT::v8i1, MVT::v8i64, 8 * AmortizationCost },
|
| /external/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 91 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i8, 7 },
92 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i8, 7 },
93 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i16, 6 },
94 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i16, 6 },
278 { ISD::SELECT, MVT::v8i1, MVT::v8i64, 50 },
|
| ARMISelDAGToDAG.cpp | [all...] |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/IR/ |
| ValueTypes.cpp | 175 case MVT::v8i64: return "v8i64";
253 case MVT::v8i64: return VectorType::get(Type::getInt64Ty(Context), 8);
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.cpp | 197 if (LocVT == MVT::v8i64 || LocVT == MVT::v16i32 || LocVT == MVT::v32i16 ||
337 (LocVT == MVT::v8i64 || LocVT == MVT::v16i32 || LocVT == MVT::v32i16 ||
410 LocVT == MVT::v16i32 || LocVT == MVT::v8i64 ||
544 return (ty == MVT::v8i64 || ty == MVT::v16i32 || ty == MVT::v32i16 ||
[all...] |
| HexagonISelDAGToDAG.cpp | 405 } else if (LoadedVT == MVT::v16i32 || LoadedVT == MVT::v8i64 ||
526 else if (StoredVT == MVT::v16i32 || StoredVT == MVT::v8i64 ||
568 else if (StoredVT == MVT::v16i32 || StoredVT == MVT::v8i64 ||
[all...] |
| HexagonInstrInfo.cpp | [all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenTarget.cpp | 108 case MVT::v8i64: return "MVT::v8i64";
|
