/external/llvm/test/MC/X86/ |
x86-32-fma3.s | 51 // CHECK: vfmadd132pd %ymm2, %ymm5, %ymm1 53 vfmadd132pd %ymm2, %ymm5, %ymm1 55 // CHECK: vfmadd132pd (%eax), %ymm5, %ymm1 57 vfmadd132pd (%eax), %ymm5, %ymm1 59 // CHECK: vfmadd132ps %ymm2, %ymm5, %ymm1 61 vfmadd132ps %ymm2, %ymm5, %ymm1 63 // CHECK: vfmadd132ps (%eax), %ymm5, %ymm1 65 vfmadd132ps (%eax), %ymm5, %ymm1 67 // CHECK: vfmadd213pd %ymm2, %ymm5, %ymm1 69 vfmadd213pd %ymm2, %ymm5, %ymm [all...] |
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
x86-64-avx-gather.s | 15 vgatherdpd %ymm5,0x8(,%xmm4,1),%ymm6 16 vgatherdpd %ymm5,-0x8(,%xmm4,1),%ymm6 17 vgatherdpd %ymm5,(,%xmm4,1),%ymm6 18 vgatherdpd %ymm5,0x298(,%xmm4,1),%ymm6 19 vgatherdpd %ymm5,0x8(,%xmm4,8),%ymm6 20 vgatherdpd %ymm5,-0x8(,%xmm4,8),%ymm6 21 vgatherdpd %ymm5,(,%xmm4,8),%ymm6 22 vgatherdpd %ymm5,0x298(,%xmm4,8),%ymm6 24 vgatherdpd %ymm5,0x8(,%xmm14,1),%ymm6 25 vgatherdpd %ymm5,-0x8(,%xmm14,1),%ymm [all...] |
avx-gather.s | 10 vgatherdpd %ymm5,0x8(,%xmm4,1),%ymm6 11 vgatherdpd %ymm5,-0x8(,%xmm4,1),%ymm6 12 vgatherdpd %ymm5,(,%xmm4,1),%ymm6 13 vgatherdpd %ymm5,0x298(,%xmm4,1),%ymm6 14 vgatherdpd %ymm5,0x8(,%xmm4,8),%ymm6 15 vgatherdpd %ymm5,-0x8(,%xmm4,8),%ymm6 16 vgatherdpd %ymm5,(,%xmm4,8),%ymm6 17 vgatherdpd %ymm5,0x298(,%xmm4,8),%ymm6 52 vpgatherdq %ymm5,0x8(,%xmm4,1),%ymm6 53 vpgatherdq %ymm5,-0x8(,%xmm4,1),%ymm [all...] |
avx512bw_vl-opts.s | 14 vmovdqu8 %ymm5, %ymm6{%k7} # AVX512{BW,VL} 15 vmovdqu8.s %ymm5, %ymm6{%k7} # AVX512{BW,VL} 16 vmovdqu8 %ymm5, %ymm6{%k7}{z} # AVX512{BW,VL} 17 vmovdqu8.s %ymm5, %ymm6{%k7}{z} # AVX512{BW,VL} 18 vmovdqu8 %ymm5, %ymm6{%k7} # AVX512{BW,VL} 19 vmovdqu8.s %ymm5, %ymm6{%k7} # AVX512{BW,VL} 20 vmovdqu8 %ymm5, %ymm6{%k7}{z} # AVX512{BW,VL} 21 vmovdqu8.s %ymm5, %ymm6{%k7}{z} # AVX512{BW,VL} 30 vmovdqu16 %ymm5, %ymm6{%k7} # AVX512{BW,VL} 31 vmovdqu16.s %ymm5, %ymm6{%k7} # AVX512{BW,VL [all...] |
avx512f_vl-opts.s | 14 vmovapd %ymm5, %ymm6{%k7} # AVX512{F,VL} 15 vmovapd.s %ymm5, %ymm6{%k7} # AVX512{F,VL} 16 vmovapd %ymm5, %ymm6{%k7}{z} # AVX512{F,VL} 17 vmovapd.s %ymm5, %ymm6{%k7}{z} # AVX512{F,VL} 18 vmovapd %ymm5, %ymm6{%k7} # AVX512{F,VL} 19 vmovapd.s %ymm5, %ymm6{%k7} # AVX512{F,VL} 20 vmovapd %ymm5, %ymm6{%k7}{z} # AVX512{F,VL} 21 vmovapd.s %ymm5, %ymm6{%k7}{z} # AVX512{F,VL} 30 vmovaps %ymm5, %ymm6{%k7} # AVX512{F,VL} 31 vmovaps.s %ymm5, %ymm6{%k7} # AVX512{F,VL [all...] |
avx512ifma_vl.s | 19 vpmadd52luq %ymm4, %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} 20 vpmadd52luq %ymm4, %ymm5, %ymm6{%k7}{z} # AVX512{IFMA,VL} 21 vpmadd52luq (%ecx), %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} 22 vpmadd52luq -123456(%esp,%esi,8), %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} 23 vpmadd52luq (%eax){1to4}, %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} 24 vpmadd52luq 4064(%edx), %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} Disp8 25 vpmadd52luq 4096(%edx), %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} 26 vpmadd52luq -4096(%edx), %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} Disp8 27 vpmadd52luq -4128(%edx), %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} 28 vpmadd52luq 1016(%edx){1to4}, %ymm5, %ymm6{%k7} # AVX512{IFMA,VL} Disp [all...] |
avx512vbmi_vl.s | 14 vpermb %ymm4, %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} 15 vpermb %ymm4, %ymm5, %ymm6{%k7}{z} # AVX512{VBMI,VL} 16 vpermb (%ecx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} 17 vpermb -123456(%esp,%esi,8), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} 18 vpermb 4064(%edx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} Disp8 19 vpermb 4096(%edx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} 20 vpermb -4096(%edx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} Disp8 21 vpermb -4128(%edx), %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} 30 vpermi2b %ymm4, %ymm5, %ymm6{%k7} # AVX512{VBMI,VL} 31 vpermi2b %ymm4, %ymm5, %ymm6{%k7}{z} # AVX512{VBMI,VL [all...] |
avx512f_vl.s | 19 vaddpd %ymm4, %ymm5, %ymm6{%k7} # AVX512{F,VL} 20 vaddpd %ymm4, %ymm5, %ymm6{%k7}{z} # AVX512{F,VL} 21 vaddpd (%ecx), %ymm5, %ymm6{%k7} # AVX512{F,VL} 22 vaddpd -123456(%esp,%esi,8), %ymm5, %ymm6{%k7} # AVX512{F,VL} 23 vaddpd (%eax){1to4}, %ymm5, %ymm6{%k7} # AVX512{F,VL} 24 vaddpd 4064(%edx), %ymm5, %ymm6{%k7} # AVX512{F,VL} Disp8 25 vaddpd 4096(%edx), %ymm5, %ymm6{%k7} # AVX512{F,VL} 26 vaddpd -4096(%edx), %ymm5, %ymm6{%k7} # AVX512{F,VL} Disp8 27 vaddpd -4128(%edx), %ymm5, %ymm6{%k7} # AVX512{F,VL} 28 vaddpd 1016(%edx){1to4}, %ymm5, %ymm6{%k7} # AVX512{F,VL} Disp [all...] |
avx512bw_vl-wig.s | 14 vpabsb %ymm5, %ymm6{%k7} # AVX512{BW,VL} 15 vpabsb %ymm5, %ymm6{%k7}{z} # AVX512{BW,VL} 30 vpabsw %ymm5, %ymm6{%k7} # AVX512{BW,VL} 31 vpabsw %ymm5, %ymm6{%k7}{z} # AVX512{BW,VL} 46 vpacksswb %ymm4, %ymm5, %ymm6{%k7} # AVX512{BW,VL} 47 vpacksswb %ymm4, %ymm5, %ymm6{%k7}{z} # AVX512{BW,VL} 48 vpacksswb (%ecx), %ymm5, %ymm6{%k7} # AVX512{BW,VL} 49 vpacksswb -123456(%esp,%esi,8), %ymm5, %ymm6{%k7} # AVX512{BW,VL} 50 vpacksswb 4064(%edx), %ymm5, %ymm6{%k7} # AVX512{BW,VL} Disp8 51 vpacksswb 4096(%edx), %ymm5, %ymm6{%k7} # AVX512{BW,VL [all...] |
avx512bw_vl-opts-intel.d | 20 [ ]*[a-f0-9]+:[ ]*62 f1 7f 2f 6f f5[ ]*vmovdqu8 ymm6\{k7\},ymm5 21 [ ]*[a-f0-9]+:[ ]*62 f1 7f 2f 7f ee[ ]*vmovdqu8\.s ymm6\{k7\},ymm5 22 [ ]*[a-f0-9]+:[ ]*62 f1 7f af 6f f5[ ]*vmovdqu8 ymm6\{k7\}\{z\},ymm5 23 [ ]*[a-f0-9]+:[ ]*62 f1 7f af 7f ee[ ]*vmovdqu8\.s ymm6\{k7\}\{z\},ymm5 24 [ ]*[a-f0-9]+:[ ]*62 f1 7f 2f 6f f5[ ]*vmovdqu8 ymm6\{k7\},ymm5 25 [ ]*[a-f0-9]+:[ ]*62 f1 7f 2f 7f ee[ ]*vmovdqu8\.s ymm6\{k7\},ymm5 26 [ ]*[a-f0-9]+:[ ]*62 f1 7f af 6f f5[ ]*vmovdqu8 ymm6\{k7\}\{z\},ymm5 27 [ ]*[a-f0-9]+:[ ]*62 f1 7f af 7f ee[ ]*vmovdqu8\.s ymm6\{k7\}\{z\},ymm5 36 [ ]*[a-f0-9]+:[ ]*62 f1 ff 2f 6f f5[ ]*vmovdqu16 ymm6\{k7\},ymm5 37 [ ]*[a-f0-9]+:[ ]*62 f1 ff 2f 7f ee[ ]*vmovdqu16\.s ymm6\{k7\},ymm5 [all...] |
avx512bw_vl-opts.d | 20 [ ]*[a-f0-9]+:[ ]*62 f1 7f 2f 6f f5[ ]*vmovdqu8 %ymm5,%ymm6\{%k7\} 21 [ ]*[a-f0-9]+:[ ]*62 f1 7f 2f 7f ee[ ]*vmovdqu8\.s %ymm5,%ymm6\{%k7\} 22 [ ]*[a-f0-9]+:[ ]*62 f1 7f af 6f f5[ ]*vmovdqu8 %ymm5,%ymm6\{%k7\}\{z\} 23 [ ]*[a-f0-9]+:[ ]*62 f1 7f af 7f ee[ ]*vmovdqu8\.s %ymm5,%ymm6\{%k7\}\{z\} 24 [ ]*[a-f0-9]+:[ ]*62 f1 7f 2f 6f f5[ ]*vmovdqu8 %ymm5,%ymm6\{%k7\} 25 [ ]*[a-f0-9]+:[ ]*62 f1 7f 2f 7f ee[ ]*vmovdqu8\.s %ymm5,%ymm6\{%k7\} 26 [ ]*[a-f0-9]+:[ ]*62 f1 7f af 6f f5[ ]*vmovdqu8 %ymm5,%ymm6\{%k7\}\{z\} 27 [ ]*[a-f0-9]+:[ ]*62 f1 7f af 7f ee[ ]*vmovdqu8\.s %ymm5,%ymm6\{%k7\}\{z\} 36 [ ]*[a-f0-9]+:[ ]*62 f1 ff 2f 6f f5[ ]*vmovdqu16 %ymm5,%ymm6\{%k7\} 37 [ ]*[a-f0-9]+:[ ]*62 f1 ff 2f 7f ee[ ]*vmovdqu16\.s %ymm5,%ymm6\{%k7\ [all...] |
avx512f_vl-opts-intel.d | 20 [ ]*[a-f0-9]+:[ ]*62 f1 fd 2f 28 f5[ ]*vmovapd ymm6\{k7\},ymm5 21 [ ]*[a-f0-9]+:[ ]*62 f1 fd 2f 29 ee[ ]*vmovapd\.s ymm6\{k7\},ymm5 22 [ ]*[a-f0-9]+:[ ]*62 f1 fd af 28 f5[ ]*vmovapd ymm6\{k7\}\{z\},ymm5 23 [ ]*[a-f0-9]+:[ ]*62 f1 fd af 29 ee[ ]*vmovapd\.s ymm6\{k7\}\{z\},ymm5 24 [ ]*[a-f0-9]+:[ ]*62 f1 fd 2f 28 f5[ ]*vmovapd ymm6\{k7\},ymm5 25 [ ]*[a-f0-9]+:[ ]*62 f1 fd 2f 29 ee[ ]*vmovapd\.s ymm6\{k7\},ymm5 26 [ ]*[a-f0-9]+:[ ]*62 f1 fd af 28 f5[ ]*vmovapd ymm6\{k7\}\{z\},ymm5 27 [ ]*[a-f0-9]+:[ ]*62 f1 fd af 29 ee[ ]*vmovapd\.s ymm6\{k7\}\{z\},ymm5 36 [ ]*[a-f0-9]+:[ ]*62 f1 7c 2f 28 f5[ ]*vmovaps ymm6\{k7\},ymm5 37 [ ]*[a-f0-9]+:[ ]*62 f1 7c 2f 29 ee[ ]*vmovaps\.s ymm6\{k7\},ymm5 [all...] |
avx512f_vl-opts.d | 20 [ ]*[a-f0-9]+:[ ]*62 f1 fd 2f 28 f5[ ]*vmovapd %ymm5,%ymm6\{%k7\} 21 [ ]*[a-f0-9]+:[ ]*62 f1 fd 2f 29 ee[ ]*vmovapd\.s %ymm5,%ymm6\{%k7\} 22 [ ]*[a-f0-9]+:[ ]*62 f1 fd af 28 f5[ ]*vmovapd %ymm5,%ymm6\{%k7\}\{z\} 23 [ ]*[a-f0-9]+:[ ]*62 f1 fd af 29 ee[ ]*vmovapd\.s %ymm5,%ymm6\{%k7\}\{z\} 24 [ ]*[a-f0-9]+:[ ]*62 f1 fd 2f 28 f5[ ]*vmovapd %ymm5,%ymm6\{%k7\} 25 [ ]*[a-f0-9]+:[ ]*62 f1 fd 2f 29 ee[ ]*vmovapd\.s %ymm5,%ymm6\{%k7\} 26 [ ]*[a-f0-9]+:[ ]*62 f1 fd af 28 f5[ ]*vmovapd %ymm5,%ymm6\{%k7\}\{z\} 27 [ ]*[a-f0-9]+:[ ]*62 f1 fd af 29 ee[ ]*vmovapd\.s %ymm5,%ymm6\{%k7\}\{z\} 36 [ ]*[a-f0-9]+:[ ]*62 f1 7c 2f 28 f5[ ]*vmovaps %ymm5,%ymm6\{%k7\} 37 [ ]*[a-f0-9]+:[ ]*62 f1 7c 2f 29 ee[ ]*vmovaps\.s %ymm5,%ymm6\{%k7\ [all...] |
avx512bw_vl.s | 14 vpabsb %ymm5, %ymm6{%k7} # AVX512{BW,VL} 15 vpabsb %ymm5, %ymm6{%k7}{z} # AVX512{BW,VL} 30 vpabsw %ymm5, %ymm6{%k7} # AVX512{BW,VL} 31 vpabsw %ymm5, %ymm6{%k7}{z} # AVX512{BW,VL} 51 vpackssdw %ymm4, %ymm5, %ymm6{%k7} # AVX512{BW,VL} 52 vpackssdw %ymm4, %ymm5, %ymm6{%k7}{z} # AVX512{BW,VL} 53 vpackssdw (%ecx), %ymm5, %ymm6{%k7} # AVX512{BW,VL} 54 vpackssdw -123456(%esp,%esi,8), %ymm5, %ymm6{%k7} # AVX512{BW,VL} 55 vpackssdw (%eax){1to8}, %ymm5, %ymm6{%k7} # AVX512{BW,VL} 56 vpackssdw 4064(%edx), %ymm5, %ymm6{%k7} # AVX512{BW,VL} Disp [all...] |
avx512ifma_vl-intel.d | 25 [ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 f4[ ]*vpmadd52luq ymm6\{k7\},ymm5,ymm4 26 [ ]*[a-f0-9]+:[ ]*62 f2 d5 af b4 f4[ ]*vpmadd52luq ymm6\{k7\}\{z\},ymm5,ymm4 27 [ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 31[ ]*vpmadd52luq ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\] 28 [ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 b4 f4 c0 1d fe ff[ ]*vpmadd52luq ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] 29 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 30[ ]*vpmadd52luq ymm6\{k7\},ymm5,QWORD PTR \[eax\]\{1to4\} 30 [ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 72 7f[ ]*vpmadd52luq ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0xfe0\] 31 [ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 b2 00 10 00 00[ ]*vpmadd52luq ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0x1000\] 32 [ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 72 80[ ]*vpmadd52luq ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1000\] 33 [ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 b2 e0 ef ff ff[ ]*vpmadd52luq ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1020\] 34 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 72 7f[ ]*vpmadd52luq ymm6\{k7\},ymm5,QWORD PTR \[edx\+0x3f8\]\{1to4\ [all...] |
avx512ifma_vl.d | 25 [ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 f4[ ]*vpmadd52luq %ymm4,%ymm5,%ymm6\{%k7\} 26 [ ]*[a-f0-9]+:[ ]*62 f2 d5 af b4 f4[ ]*vpmadd52luq %ymm4,%ymm5,%ymm6\{%k7\}\{z\} 27 [ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 31[ ]*vpmadd52luq \(%ecx\),%ymm5,%ymm6\{%k7\} 28 [ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 b4 f4 c0 1d fe ff[ ]*vpmadd52luq -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\} 29 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 30[ ]*vpmadd52luq \(%eax\)\{1to4\},%ymm5,%ymm6\{%k7\} 30 [ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 72 7f[ ]*vpmadd52luq 0xfe0\(%edx\),%ymm5,%ymm6\{%k7\} 31 [ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 b2 00 10 00 00[ ]*vpmadd52luq 0x1000\(%edx\),%ymm5,%ymm6\{%k7\} 32 [ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 72 80[ ]*vpmadd52luq -0x1000\(%edx\),%ymm5,%ymm6\{%k7\} 33 [ ]*[a-f0-9]+:[ ]*62 f2 d5 2f b4 b2 e0 ef ff ff[ ]*vpmadd52luq -0x1020\(%edx\),%ymm5,%ymm6\{%k7\} 34 [ ]*[a-f0-9]+:[ ]*62 f2 d5 3f b4 72 7f[ ]*vpmadd52luq 0x3f8\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\ [all...] |
avx512vbmi_vl-intel.d | 20 [ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d f4[ ]*vpermb ymm6\{k7\},ymm5,ymm4 21 [ ]*[a-f0-9]+:[ ]*62 f2 55 af 8d f4[ ]*vpermb ymm6\{k7\}\{z\},ymm5,ymm4 22 [ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d 31[ ]*vpermb ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\] 23 [ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d b4 f4 c0 1d fe ff[ ]*vpermb ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] 24 [ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d 72 7f[ ]*vpermb ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0xfe0\] 25 [ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d b2 00 10 00 00[ ]*vpermb ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0x1000\] 26 [ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d 72 80[ ]*vpermb ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1000\] 27 [ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d b2 e0 ef ff ff[ ]*vpermb ymm6\{k7\},ymm5,YMMWORD PTR \[edx-0x1020\] 36 [ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 f4[ ]*vpermi2b ymm6\{k7\},ymm5,ymm4 37 [ ]*[a-f0-9]+:[ ]*62 f2 55 af 75 f4[ ]*vpermi2b ymm6\{k7\}\{z\},ymm5,ymm [all...] |
avx512vbmi_vl.d | 20 [ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d f4[ ]*vpermb %ymm4,%ymm5,%ymm6\{%k7\} 21 [ ]*[a-f0-9]+:[ ]*62 f2 55 af 8d f4[ ]*vpermb %ymm4,%ymm5,%ymm6\{%k7\}\{z\} 22 [ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d 31[ ]*vpermb \(%ecx\),%ymm5,%ymm6\{%k7\} 23 [ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d b4 f4 c0 1d fe ff[ ]*vpermb -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\} 24 [ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d 72 7f[ ]*vpermb 0xfe0\(%edx\),%ymm5,%ymm6\{%k7\} 25 [ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d b2 00 10 00 00[ ]*vpermb 0x1000\(%edx\),%ymm5,%ymm6\{%k7\} 26 [ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d 72 80[ ]*vpermb -0x1000\(%edx\),%ymm5,%ymm6\{%k7\} 27 [ ]*[a-f0-9]+:[ ]*62 f2 55 2f 8d b2 e0 ef ff ff[ ]*vpermb -0x1020\(%edx\),%ymm5,%ymm6\{%k7\} 36 [ ]*[a-f0-9]+:[ ]*62 f2 55 2f 75 f4[ ]*vpermi2b %ymm4,%ymm5,%ymm6\{%k7\} 37 [ ]*[a-f0-9]+:[ ]*62 f2 55 af 75 f4[ ]*vpermi2b %ymm4,%ymm5,%ymm6\{%k7\}\{z\ [all...] |
avx512dq_vl.s | 41 vcvtpd2qq %ymm5, %ymm6{%k7} # AVX512{DQ,VL} 42 vcvtpd2qq %ymm5, %ymm6{%k7}{z} # AVX512{DQ,VL} 67 vcvtpd2uqq %ymm5, %ymm6{%k7} # AVX512{DQ,VL} 68 vcvtpd2uqq %ymm5, %ymm6{%k7}{z} # AVX512{DQ,VL} 145 vcvtqq2pd %ymm5, %ymm6{%k7} # AVX512{DQ,VL} 146 vcvtqq2pd %ymm5, %ymm6{%k7}{z} # AVX512{DQ,VL} 171 vcvtqq2ps %ymm5, %xmm6{%k7} # AVX512{DQ,VL} 172 vcvtqq2ps %ymm5, %xmm6{%k7}{z} # AVX512{DQ,VL} 197 vcvtuqq2pd %ymm5, %ymm6{%k7} # AVX512{DQ,VL} 198 vcvtuqq2pd %ymm5, %ymm6{%k7}{z} # AVX512{DQ,VL [all...] |
avx512f_vl.d | 25 [ ]*[a-f0-9]+:[ ]*62 f1 d5 2f 58 f4[ ]*vaddpd %ymm4,%ymm5,%ymm6\{%k7\} 26 [ ]*[a-f0-9]+:[ ]*62 f1 d5 af 58 f4[ ]*vaddpd %ymm4,%ymm5,%ymm6\{%k7\}\{z\} 27 [ ]*[a-f0-9]+:[ ]*62 f1 d5 2f 58 31[ ]*vaddpd \(%ecx\),%ymm5,%ymm6\{%k7\} 28 [ ]*[a-f0-9]+:[ ]*62 f1 d5 2f 58 b4 f4 c0 1d fe ff[ ]*vaddpd -0x1e240\(%esp,%esi,8\),%ymm5,%ymm6\{%k7\} 29 [ ]*[a-f0-9]+:[ ]*62 f1 d5 3f 58 30[ ]*vaddpd \(%eax\)\{1to4\},%ymm5,%ymm6\{%k7\} 30 [ ]*[a-f0-9]+:[ ]*62 f1 d5 2f 58 72 7f[ ]*vaddpd 0xfe0\(%edx\),%ymm5,%ymm6\{%k7\} 31 [ ]*[a-f0-9]+:[ ]*62 f1 d5 2f 58 b2 00 10 00 00[ ]*vaddpd 0x1000\(%edx\),%ymm5,%ymm6\{%k7\} 32 [ ]*[a-f0-9]+:[ ]*62 f1 d5 2f 58 72 80[ ]*vaddpd -0x1000\(%edx\),%ymm5,%ymm6\{%k7\} 33 [ ]*[a-f0-9]+:[ ]*62 f1 d5 2f 58 b2 e0 ef ff ff[ ]*vaddpd -0x1020\(%edx\),%ymm5,%ymm6\{%k7\} 34 [ ]*[a-f0-9]+:[ ]*62 f1 d5 3f 58 72 7f[ ]*vaddpd 0x3f8\(%edx\)\{1to4\},%ymm5,%ymm6\{%k7\ [all...] |
x86-64-avx-gather-intel.d | 20 [ ]*[a-f0-9]+: c4 e2 d5 92 34 25 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x8\],ymm5 21 [ ]*[a-f0-9]+: c4 e2 d5 92 34 25 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm4\*1-0x8\],ymm5 22 [ ]*[a-f0-9]+: c4 e2 d5 92 34 25 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x0\],ymm5 23 [ ]*[a-f0-9]+: c4 e2 d5 92 34 25 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x298\],ymm5 24 [ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x8\],ymm5 25 [ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm4\*8-0x8\],ymm5 26 [ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x0\],ymm5 27 [ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x298\],ymm5 28 [ ]*[a-f0-9]+: c4 a2 d5 92 34 35 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm14\*1\+0x8\],ymm5 29 [ ]*[a-f0-9]+: c4 a2 d5 92 34 35 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm14\*1-0x8\],ymm5 [all...] |
x86-64-avx-gather.d | 19 [ ]*[a-f0-9]+: c4 e2 d5 92 34 25 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm4,1\),%ymm6 20 [ ]*[a-f0-9]+: c4 e2 d5 92 34 25 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm4,1\),%ymm6 21 [ ]*[a-f0-9]+: c4 e2 d5 92 34 25 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm4,1\),%ymm6 22 [ ]*[a-f0-9]+: c4 e2 d5 92 34 25 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm4,1\),%ymm6 23 [ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm4,8\),%ymm6 24 [ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm4,8\),%ymm6 25 [ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm4,8\),%ymm6 26 [ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm4,8\),%ymm6 27 [ ]*[a-f0-9]+: c4 a2 d5 92 34 35 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm14,1\),%ymm6 28 [ ]*[a-f0-9]+: c4 a2 d5 92 34 35 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm14,1\),%ymm [all...] |
avx-gather-intel.d | 16 [ ]*[a-f0-9]+: c4 e2 d5 92 34 25 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x8\],ymm5 17 [ ]*[a-f0-9]+: c4 e2 d5 92 34 25 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm4\*1-0x8\],ymm5 18 [ ]*[a-f0-9]+: c4 e2 d5 92 34 25 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x0\],ymm5 19 [ ]*[a-f0-9]+: c4 e2 d5 92 34 25 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*1\+0x298\],ymm5 20 [ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 08 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x8\],ymm5 21 [ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 f8 ff ff ff vgatherdpd ymm6,QWORD PTR \[xmm4\*8-0x8\],ymm5 22 [ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 00 00 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x0\],ymm5 23 [ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 98 02 00 00 vgatherdpd ymm6,QWORD PTR \[xmm4\*8\+0x298\],ymm5 52 [ ]*[a-f0-9]+: c4 e2 d5 90 34 25 08 00 00 00 vpgatherdq ymm6,QWORD PTR \[xmm4\*1\+0x8\],ymm5 53 [ ]*[a-f0-9]+: c4 e2 d5 90 34 25 f8 ff ff ff vpgatherdq ymm6,QWORD PTR \[xmm4\*1-0x8\],ymm5 [all...] |
avx-gather.d | 15 [ ]*[a-f0-9]+: c4 e2 d5 92 34 25 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm4,1\),%ymm6 16 [ ]*[a-f0-9]+: c4 e2 d5 92 34 25 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm4,1\),%ymm6 17 [ ]*[a-f0-9]+: c4 e2 d5 92 34 25 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm4,1\),%ymm6 18 [ ]*[a-f0-9]+: c4 e2 d5 92 34 25 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm4,1\),%ymm6 19 [ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 08 00 00 00 vgatherdpd %ymm5,0x8\(,%xmm4,8\),%ymm6 20 [ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 f8 ff ff ff vgatherdpd %ymm5,-0x8\(,%xmm4,8\),%ymm6 21 [ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 00 00 00 00 vgatherdpd %ymm5,0x0\(,%xmm4,8\),%ymm6 22 [ ]*[a-f0-9]+: c4 e2 d5 92 34 e5 98 02 00 00 vgatherdpd %ymm5,0x298\(,%xmm4,8\),%ymm6 51 [ ]*[a-f0-9]+: c4 e2 d5 90 34 25 08 00 00 00 vpgatherdq %ymm5,0x8\(,%xmm4,1\),%ymm6 52 [ ]*[a-f0-9]+: c4 e2 d5 90 34 25 f8 ff ff ff vpgatherdq %ymm5,-0x8\(,%xmm4,1\),%ymm [all...] |
avx512bw_vl-wig1-intel.d | 20 [ ]*[a-f0-9]+:[ ]*62 f2 fd 2f 1c f5[ ]*vpabsb ymm6\{k7\},ymm5 21 [ ]*[a-f0-9]+:[ ]*62 f2 fd af 1c f5[ ]*vpabsb ymm6\{k7\}\{z\},ymm5 36 [ ]*[a-f0-9]+:[ ]*62 f2 fd 2f 1d f5[ ]*vpabsw ymm6\{k7\},ymm5 37 [ ]*[a-f0-9]+:[ ]*62 f2 fd af 1d f5[ ]*vpabsw ymm6\{k7\}\{z\},ymm5 52 [ ]*[a-f0-9]+:[ ]*62 f1 d5 2f 63 f4[ ]*vpacksswb ymm6\{k7\},ymm5,ymm4 53 [ ]*[a-f0-9]+:[ ]*62 f1 d5 af 63 f4[ ]*vpacksswb ymm6\{k7\}\{z\},ymm5,ymm4 54 [ ]*[a-f0-9]+:[ ]*62 f1 d5 2f 63 31[ ]*vpacksswb ymm6\{k7\},ymm5,YMMWORD PTR \[ecx\] 55 [ ]*[a-f0-9]+:[ ]*62 f1 d5 2f 63 b4 f4 c0 1d fe ff[ ]*vpacksswb ymm6\{k7\},ymm5,YMMWORD PTR \[esp\+esi\*8-0x1e240\] 56 [ ]*[a-f0-9]+:[ ]*62 f1 d5 2f 63 72 7f[ ]*vpacksswb ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0xfe0\] 57 [ ]*[a-f0-9]+:[ ]*62 f1 d5 2f 63 b2 00 10 00 00[ ]*vpacksswb ymm6\{k7\},ymm5,YMMWORD PTR \[edx\+0x1000\ [all...] |