| /hardware/intel/common/libmix/videodecoder/securevideo/cherrytrail/ |
| secvideoparser.h | 70 } op2; member in union:_dec_ref_pic_marking_t::__anon29843::__anon29844
|
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| AArch64Disassembler.cpp | 635 // S<op0>_<op1>_<Cn>_<Cm>_<op2>, so decoding system registers always succeeds.
1514 uint64_t op2 = fieldFromInstruction(insn, 5, 3); local
[all...] |
| /external/valgrind/coregrind/m_debuginfo/ |
| readexidx.c | 451 UChar op2; local
452 GET_BUF_U8(op2);
453 if (op == 0x80 && op2 == 0x00) {
459 edata.data = ((op & 0xf) << 8) | op2;
489 UChar op2; local
490 GET_BUF_U8(op2);
491 if (op2 == 0 || (op2 & 0xf0)) {
497 edata.data = op2 & 0x0f;
539 UChar op2; local
[all...] |
| /toolchain/binutils/binutils-2.25/gas/config/ |
| tc-pdp11.c | 653 struct pdp11_code insn, op1, op2;
691 op2.error = NULL;
692 op2.additional = FALSE;
693 op2.reloc.type = BFD_RELOC_NONE;
796 str = parse_reg (str, &op2);
797 if (op2.error)
799 insn.code |= op2.code << 6;
803 op2.error = _("Missing ','");
824 op2.error = _("Missing ','");
827 str = parse_reg (str, &op2);
651 struct pdp11_code insn, op1, op2; local
[all...] |
| /art/disassembler/ |
| disassembler_arm.cc | 492 // |111|op1| op2 | | |
502 uint32_t op2 = (instr >> 20) & 0x7F; local
509 if ((op2 & 0x64) == 0) { // 00x x0xx
517 // |111|01| op2 | | |
554 } else if ((op2 & 0x64) == 4) { // 00x x1xx
681 } else if ((op2 & 0x60) == 0x20) { // 01x xxxx
805 } else if ((op2 & 0x40) == 0x40) { // 1xx xxxx
1336 opcode << "UNKNOWN " << op2 << " [SIMD]"; local
1588 opcode << "UNKNOWN " << op2; local
[all...] |
| /external/freetype/src/cff/ |
| cf2intrp.c | 830 FT_Byte op2 = (FT_Byte)cf2_buf_readByte( charstring ); local
833 switch ( op2 )
[all...] |
| /external/javassist/src/main/javassist/compiler/ |
| Parser.java | 417 int op2 = s2.getOperator(); local
418 if (op2 == CASE || op2 == DEFAULT) {
[all...] |
| /external/libgdx/extensions/gdx-freetype/jni/freetype-2.6.2/src/cff/ |
| cf2intrp.c | 825 FT_Byte op2 = (FT_Byte)cf2_buf_readByte( charstring ); local
828 switch ( op2 )
[all...] |
| /external/mesa3d/src/gallium/auxiliary/rtasm/ |
| rtasm_ppc.c | 295 unsigned op2:11; member in struct:vx_inst::__anon18981
300 emit_vx(struct ppc_function *p, uint op2, uint vD, uint vA, uint vB,
308 inst.inst.op2 = op2;
328 unsigned op2:10; member in struct:vxr_inst::__anon18982
333 emit_vxr(struct ppc_function *p, uint op2, uint vD, uint vA, uint vB,
342 inst.inst.op2 = op2;
359 unsigned op2:6; member in struct:va_inst::__anon18983
364 emit_va(struct ppc_function *p, uint op2, uint vD, uint vA, uint vB, uint vC
412 unsigned op2:10; member in struct:xl_inst::__anon18985
456 unsigned op2:10; member in struct:x_inst::__anon18986
520 unsigned op2:5; member in struct:a_inst::__anon18988
553 unsigned op2:9; member in struct:xo_inst::__anon18989
[all...] |
| /external/opencv3/modules/core/test/ |
| test_io.cpp | 447 Point3i p2(3, 4, 5), op2;
482 fs["p2"] >> op2; local
498 CV_Assert( op2 == p2 );
|
| /external/pdfium/third_party/freetype/src/cff/ |
| cf2intrp.c | 825 FT_Byte op2 = (FT_Byte)cf2_buf_readByte( charstring ); local
828 switch ( op2 )
[all...] |
| /system/core/libpixelflinger/tests/arch-arm64/assembler/ |
| arm64_assembler_test.cpp | 421 uint32_t op2; local
436 op2 = a64asm->imm(test.immValue);
440 op2 = Rm;
445 op2 = a64asm->reg_imm(Rm, test.shiftMode, test.shiftAmount);
450 case INSTR_ADD: a64asm->ADD(test.cond, test.setFlags, Rd,Rn,op2); break;
451 case INSTR_SUB: a64asm->SUB(test.cond, test.setFlags, Rd,Rn,op2); break;
452 case INSTR_RSB: a64asm->RSB(test.cond, test.setFlags, Rd,Rn,op2); break;
453 case INSTR_AND: a64asm->AND(test.cond, test.setFlags, Rd,Rn,op2); break;
454 case INSTR_ORR: a64asm->ORR(test.cond, test.setFlags, Rd,Rn,op2); break;
455 case INSTR_BIC: a64asm->BIC(test.cond, test.setFlags, Rd,Rn,op2); break
532 uint32_t op2; local
684 uint32_t op2 = a64asm->imm(0x31); local
[all...] |
| /system/core/libpixelflinger/tests/arch-mips64/assembler/ |
| mips64_assembler_test.cpp | 379 uint32_t op2; local
398 op2 = a64asm->imm(test.immValue);
402 op2 = Rm;
407 op2 = a64asm->reg_imm(Rm, test.shiftMode, test.shiftAmount);
412 case INSTR_ADD: a64asm->ADD(test.cond, test.setFlags, Rd,Rn,op2); break;
413 case INSTR_SUB: a64asm->SUB(test.cond, test.setFlags, Rd,Rn,op2); break;
414 case INSTR_RSB: a64asm->RSB(test.cond, test.setFlags, Rd,Rn,op2); break;
415 case INSTR_AND: a64asm->AND(test.cond, test.setFlags, Rd,Rn,op2); break;
416 case INSTR_ORR: a64asm->ORR(test.cond, test.setFlags, Rd,Rn,op2); break;
417 case INSTR_BIC: a64asm->BIC(test.cond, test.setFlags, Rd,Rn,op2); break
485 uint32_t op2; local
[all...] |
| /toolchain/binutils/binutils-2.25/bfd/ |
| elf32-h8300.c | 1233 unsigned char op0, op1, op2, op3; local
1377 unsigned char op0, op1, op2, op3, op0n, op1n; local
[all...] |
| /toolchain/binutils/binutils-2.25/include/opcode/ |
| d30v.h | 78 int op2; /* the rest of the opcode */ member in struct:d30v_opcode
|
| /art/compiler/optimizing/ |
| intrinsics_arm.cc | 333 Register op2 = locations->InAt(1).AsRegister<Register>(); local
336 __ cmp(op1, ShifterOperand(op2));
340 __ mov(out, ShifterOperand(op2), is_min ? Condition::GE : Condition::LE);
[all...] |
| intrinsics_arm64.cc | 480 Location op2 = locations->InAt(1); local
484 FPRegister op2_reg = is_double ? DRegisterFrom(op2) : SRegisterFrom(op2);
540 Location op2 = locations->InAt(1); local
544 Register op2_reg = is_long ? XRegisterFrom(op2) : WRegisterFrom(op2);
[all...] |
| intrinsics_x86.cc | 420 // out <=? op2
423 // if op2 is min jmp op2_label
429 // out := op2
436 XmmRegister op2 = op2_loc.AsFpuRegister<XmmRegister>(); local
440 __ ucomisd(out, op2);
442 __ ucomiss(out, op2);
453 __ orpd(out, op2);
455 __ orps(out, op2);
459 __ andpd(out, op2);
461 __ andps(out, op2);
609 Register op2 = op2_loc.AsRegister<Register>(); local
[all...] |
| intrinsics_x86_64.cc | 308 // out <=? op2
311 // if op2 is min jmp op2_label
317 // out := op2
324 XmmRegister op2 = op2_loc.AsFpuRegister<XmmRegister>(); local
328 __ ucomisd(out, op2);
330 __ ucomiss(out, op2);
341 __ orpd(out, op2);
343 __ orps(out, op2);
347 __ andpd(out, op2);
349 __ andps(out, op2);
437 CpuRegister op2 = op2_loc.AsRegister<CpuRegister>(); local
[all...] |
| /external/crcalc/src/com/hp/creals/ |
| CR.java | 1029 CR op2; field in class:add_CR
1074 CR op2; field in class:select_CR
1106 CR op2; field in class:mult_CR
[all...] |
| /external/libcxxabi/src/ |
| cxa_demangle.cpp | 3671 auto op2 = db.names.back().move_full(); local
[all...] |
| /external/libdrm/freedreno/kgsl/ |
| msm_kgsl.h | 382 unsigned int op2; member in struct:kgsl_cff_user_event
|
| /external/libvpx/libvpx/vpx_dsp/x86/ |
| loopfilter_sse2.c | 401 __m128i op2, op1, op0, oq0, oq1, oq2; local
566 op2 = filter8_mask(&flat, &p2, &f8_lo, &f8_hi);
666 op2 = filter16_mask(&flat2, &op2, &f_lo, &f_hi);
667 _mm_storeu_si128((__m128i *)(s - 3 * p), op2);
[all...] |
| /external/valgrind/VEX/priv/ |
| host_s390_isel.c | 952 s390_opnd_RMI op2; local
955 op2 = s390_isel_int_expr_RMI(env, arg2); /* Process 2nd operand */
965 addInstr(env, s390_insn_divs(8, r10, r11, op2));
983 s390_opnd_RMI op2; local
988 op2 = s390_isel_int_expr_RMI(env, arg2); /* Process 2nd operand */
1011 s390_opnd_RMI op2; local
1119 s390_opnd_RMI op2, value, opnd; local
2342 HReg op1, op2, op3, dst; local
2373 HReg h1, op2, dst; local
2778 HReg op1_hi, op1_lo, op2, f9, f11, f13, f15; local
3135 HReg op2; local
3230 HReg op2, op3, dst; local
3419 s390_opnd_RMI op1, op2; local
3451 s390_opnd_RMI op2; local
3468 s390_opnd_RMI op2; local
3484 s390_opnd_RMI op2; local
3860 s390_amode *op2 = s390_isel_amode_b12_b20(env, cas->addr); local
3873 s390_amode *op2 = s390_isel_amode_b12_b20(env, cas->addr); local
[all...] |
| /hardware/qcom/msm8x27/kernel-headers/linux/ |
| msm_kgsl.h | 291 unsigned int op2; member in struct:kgsl_cff_user_event
|
