| /external/llvm/test/CodeGen/AArch64/ |
| blockaddress.ll | 11 ; CHECK: adrp [[DEST_HI:x[0-9]+]], [[DEST_LBL:.Ltmp[0-9]+]]
|
| got-abuse.ll | 19 ; CHECK: adrp x[[ADDRHI:[0-9]+]], :got:func
|
| stack-guard-remat-bitcast.ll | 7 ; CHECK: adrp [[R0:x[0-9]+]], ___stack_chk_guard@GOTPAGE
|
| arm64-promote-const.ll | 14 ; PROMOTED: adrp [[PAGEADDR:x[0-9]+]], __PromotedConst@PAGE
24 ; REGULAR: adrp [[PAGEADDR:x[0-9]+]], [[CSTLABEL:lCP.*]]@PAGE
27 ; REGULAR: adrp [[PAGEADDR:x[0-9]+]], [[CSTLABEL:lCP.*]]@PAGE
29 ; REGULAR: adrp [[PAGEADDR2:x[0-9]+]], [[CSTLABEL2:lCP.*]]@PAGE
31 ; REGULAR: adrp [[PAGEADDR3:x[0-9]+]], [[CSTLABEL3:lCP.*]]@PAGE
43 ; PROMOTED: adrp [[PAGEADDR:x[0-9]+]], [[CSTV1:__PromotedConst.[0-9]+]]@PAGE
54 ; REGULAR: adrp [[PAGEADDR:x[0-9]+]], [[CSTLABEL:lCP.*]]@PAGE
165 ; PROMOTED: adrp
174 ; PROMOTED-NOT: adrp
|
| ldst-unsignedimm.ll | 22 ; CHECK: adrp {{x[0-9]+}}, var_8bit
76 ; CHECK: adrp {{x[0-9]+}}, var_16bit
126 ; CHECK: adrp {{x[0-9]+}}, var_32bit
167 ; CHECK: adrp {{x[0-9]+}}, arr8
182 ; CHECK: adrp {{x[0-9]+}}, arr16
197 ; CHECK: adrp {{x[0-9]+}}, arr32
212 ; CHECK: adrp {{x[0-9]+}}, arr64
232 ; CHECK: adrp {{x[0-9]+}}, var_float
247 ; CHECK: adrp {{x[0-9]+}}, var_double
|
| arm64-vshuffle.ll | 27 ; CHECK: adrp x[[REG2:[0-9]+]], lCPI1_0@PAGE
66 ; CHECK: adrp x[[REG3:[0-9]+]], lCPI3_0@PAGE
|
| jump-table.ll | 14 ; CHECK: adrp [[JTPAGE:x[0-9]+]], .LJTI0_0
26 ; CHECK-PIC: adrp [[JTPAGE:x[0-9]+]], .LJTI0_0
|
| literal_pools_float.ll | 14 ; CHECK: adrp x[[LITBASE:[0-9]+]], [[CURLIT:.LCPI[0-9]+_[0-9]+]]
31 ; CHECK: adrp x[[LITBASE:[0-9]+]], [[CURLIT:.LCPI[0-9]+_[0-9]+]]
|
| arm64-swizzle-tbl-i16-layout.ll | 29 ; CHECK: adrp [[BASE:x[0-9]+]], lCPI0_0@PAGE
|
| arm64-neon-simd-ldst-one.ll | 46 ; CHECK: adrp {{x[0-9]+}}, .{{[A-Z0-9_]+}}
55 ; CHECK: adrp {{x[0-9]+}}, .{{[A-Z0-9_]+}}
64 ; CHECK: adrp {{x[0-9]+}}, .{{[A-Z0-9_]+}}
73 ; CHECK: adrp {{x[0-9]+}}, .{{[A-Z0-9_]+}}
82 ; CHECK: adrp {{x[0-9]+}}, .{{[A-Z0-9_]+}}
91 ; CHECK: adrp {{x[0-9]+}}, .{{[A-Z0-9_]+}}
100 ; CHECK: adrp {{x[0-9]+}}, .{{[A-Z0-9_]+}}
109 ; CHECK: adrp {{x[0-9]+}}, .{{[A-Z0-9_]+}}
118 ; CHECK: adrp {{x[0-9]+}}, .{{[A-Z0-9_]+}}
|
| arm64-setcc-int-to-fp-combine.ll | 38 ; CHECK: adrp x8, lCPI2_0@PAGE
|
| dag-combine-select.ll | 27 ; CHECK: adrp x[[OUTNUM:[0-9]+]], out
|
| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-aarch64/ |
| weak-undefined.d | 17 +f0000030: 90000000 adrp x0, f0000000 <main>
|
| erratum843419.s | 26 adrp x0, data0
|
| /external/clang/test/CodeGen/ |
| aarch64-inline-asm.c | 47 asm("adrp %0, %A1\n\t"
49 // CHECK: call i32* asm "adrp $0, ${1:A}\0A\09add $0, $0, ${1:L}", "=r,S"(i64* @var)
|
| /bionic/libc/arch-arm64/denver64/bionic/ |
| memcpy.S | 52 adrp x0, error_string
|
| /bionic/libc/arch-arm64/generic/bionic/ |
| memcpy.S | 52 adrp x0, error_string
|
| /external/llvm/test/MC/AArch64/ |
| jump-table.s | 14 adrp x0, .LJTI0_0
|
| /external/llvm/test/MC/MachO/AArch64/ |
| darwin-ARM64-reloc.s | 8 adrp x3, _data@page
13 adrp x3, _data@page+1
16 adrp x3, _data_ext@gotpage
18 adrp x0, L_.str@PAGE
|
| /art/compiler/linker/arm64/ |
| relative_patcher_arm64_test.cc | 182 uint32_t adrp = 0x90000000 | // ADRP x0, +SignExtend(immhi:immlo:Zeros(12), 64) local
187 result.push_back(static_cast<uint8_t>(adrp));
188 result.push_back(static_cast<uint8_t>(adrp >> 8));
189 result.push_back(static_cast<uint8_t>(adrp >> 16));
190 result.push_back(static_cast<uint8_t>(adrp >> 24));
316 // Replace adrp with bl.
[all...] |
| /external/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/ |
| RuntimeDyldMachOAArch64.h | 82 // Verify that the relocation points to the expected adrp instruction.
84 assert((*p & 0x9F000000) == 0x90000000 && "Expected adrp instruction.");
86 // Get the 21 bit addend encoded in the adrp instruction and sign-extend
178 // Verify that the relocation points to the expected adrp instruction.
180 assert((*p & 0x9F000000) == 0x90000000 && "Expected adrp instruction.");
183 assert((Addend & 0xFFF) == 0 && "ADRP target is not page aligned.");
|
| /toolchain/binutils/binutils-2.25/gas/doc/ |
| c-aarch64.texi | 187 @cindex ADRP, ADD, LDR/STR group relocations, AArch64
188 Relocations for @samp{ADRP}, and @samp{ADD}, @samp{LDR} or @samp{STR}
196 adrp x0, :pg_hi21:foo
203 adrp x0, :pg_hi21:foo
210 adrp x0, foo
216 adrp x0, :pg_hi21:foo
|
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| AArch64ExternalSymbolizer.cpp | 56 /// tested and for ADRP an other instructions that help to load of pointers
91 } else if (MI.getOpcode() == AArch64::ADRP) {
93 // otool expects the fully encoded ADRP instruction to be passed in as
|
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64FixupKinds.h | 24 // an ADRP instruction.
|
| /prebuilts/go/darwin-x86/pkg/bootstrap/src/bootstrap/internal/obj/arm64/ |
| anames.go | 21 "ADRP",
|
