| /art/compiler/utils/x86/ |
| assembler_x86.h | 408 void divsd(XmmRegister dst, XmmRegister src);
409 void divsd(XmmRegister dst, const Address& src);
|
| /bionic/libm/x86/ |
| s_atan.S | 103 divsd %xmm1, %xmm0
178 divsd %xmm0, %xmm1
|
| e_acos.S | 141 divsd %xmm6, %xmm7
210 divsd %xmm7, %xmm4
309 divsd %xmm3, %xmm5
[all...] |
| e_asin.S | 142 divsd %xmm6, %xmm0
214 divsd %xmm7, %xmm4
324 divsd %xmm3, %xmm4
[all...] |
| e_log.S | 196 divsd %xmm1, %xmm0
|
| /bionic/libm/x86_64/ |
| s_atan.S | 86 divsd %xmm1, %xmm0
154 divsd %xmm0, %xmm1
|
| e_acos.S | 124 divsd %xmm6, %xmm7
192 divsd %xmm7, %xmm4
288 divsd %xmm3, %xmm5
[all...] |
| e_asin.S | 125 divsd %xmm6, %xmm0
196 divsd %xmm7, %xmm4
303 divsd %xmm3, %xmm4
[all...] |
| /external/v8/test/cctest/ |
| test-disasm-ia32.cc | 451 __ divsd(xmm1, xmm0);
452 __ divsd(xmm1, Operand(ebx, ecx, times_4, 10000));
|
| test-disasm-x64.cc | 443 __ divsd(xmm1, xmm0);
444 __ divsd(xmm1, Operand(rbx, rcx, times_4, 10000));
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ |
| simd-intel.d | 53 [ ]*[a-f0-9]+: f2 0f 5e 00 divsd xmm0,QWORD PTR \[eax\]
146 [ ]*[a-f0-9]+: f2 0f 5e 00 divsd xmm0,QWORD PTR \[eax\]
|
| simd-suffix.d | 53 [ ]*[a-f0-9]+: f2 0f 5e 00 divsd \(%eax\),%xmm0
146 [ ]*[a-f0-9]+: f2 0f 5e 00 divsd \(%eax\),%xmm0
|
| simd.d | 52 [ ]*[a-f0-9]+: f2 0f 5e 00 divsd \(%eax\),%xmm0
145 [ ]*[a-f0-9]+: f2 0f 5e 00 divsd \(%eax\),%xmm0
|
| sse2.d | 78 [ ]*[a-f0-9]+: f2 0f 5e d3 divsd %xmm3,%xmm2
79 [ ]*[a-f0-9]+: f2 0f 5e 1c 24 divsd \(%esp\),%xmm3
|
| x86-64-simd-intel.d | 73 [ ]*[a-f0-9]+: f2 0f 5e 00 divsd xmm0,QWORD PTR \[rax\]
192 [ ]*[a-f0-9]+: f2 0f 5e 00 divsd xmm0,QWORD PTR \[rax\]
|
| x86-64-simd-suffix.d | 73 [ ]*[a-f0-9]+: f2 0f 5e 00 divsd \(%rax\),%xmm0
192 [ ]*[a-f0-9]+: f2 0f 5e 00 divsd \(%rax\),%xmm0
|
| x86-64-simd.d | 72 [ ]*[a-f0-9]+: f2 0f 5e 00 divsd \(%rax\),%xmm0
191 [ ]*[a-f0-9]+: f2 0f 5e 00 divsd \(%rax\),%xmm0
|
| /art/compiler/utils/x86_64/ |
| assembler_x86_64_test.cc | [all...] |
| assembler_x86_64.h | 425 void divsd(XmmRegister dst, XmmRegister src);
426 void divsd(XmmRegister dst, const Address& src);
[all...] |
| /external/valgrind/memcheck/tests/amd64/ |
| sse_memory.c | 292 TEST_INSN( &AllMask, SD,divsd)
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/ilp32/ |
| x86-64-simd-intel.d | 73 [ ]*[a-f0-9]+: f2 0f 5e 00 divsd xmm0,QWORD PTR \[rax\]
192 [ ]*[a-f0-9]+: f2 0f 5e 00 divsd xmm0,QWORD PTR \[rax\]
|
| x86-64-simd-suffix.d | 73 [ ]*[a-f0-9]+: f2 0f 5e 00 divsd \(%rax\),%xmm0
192 [ ]*[a-f0-9]+: f2 0f 5e 00 divsd \(%rax\),%xmm0
|
| x86-64-simd.d | 73 [ ]*[a-f0-9]+: f2 0f 5e 00 divsd \(%rax\),%xmm0
192 [ ]*[a-f0-9]+: f2 0f 5e 00 divsd \(%rax\),%xmm0
|
| /external/llvm/test/CodeGen/X86/ |
| lsr-reuse.ll | 58 ; CHECK: divsd (%rdx), %xmm0
104 ; CHECK: divsd -2048(%rdx), %xmm0
149 ; CHECK: divsd -4096(%rdx), %xmm0
[all...] |
| /external/v8/src/ia32/ |
| assembler-ia32.h | [all...] |
