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  /external/llvm/test/Transforms/SLPVectorizer/ARM/
sroa.ll 17 %a.coerce.fca.0.extract = extractvalue [4 x i32] %a.coerce, 0
18 %a.sroa.0.0.insert.ext = zext i32 %a.coerce.fca.0.extract to i64
19 %a.coerce.fca.1.extract = extractvalue [4 x i32] %a.coerce, 1
20 %a.sroa.0.4.insert.ext = zext i32 %a.coerce.fca.1.extract to i64
24 %a.coerce.fca.2.extract = extractvalue [4 x i32] %a.coerce, 2
25 %a.sroa.3.8.insert.ext = zext i32 %a.coerce.fca.2.extract to i64
26 %a.coerce.fca.3.extract = extractvalue [4 x i32] %a.coerce, 3
27 %a.sroa.3.12.insert.ext = zext i32 %a.coerce.fca.3.extract to i64
31 %b.coerce.fca.0.extract = extractvalue [4 x i32] %b.coerce, 0
32 %b.sroa.0.0.insert.ext = zext i32 %b.coerce.fca.0.extract to i6
    [all...]
  /external/llvm/test/Analysis/CostModel/X86/
insert-extract-at-zero.ll 6 define i32 @insert-extract-at-zero-idx(i32 %arg, float %fl) {
7 ;CHECK: cost of 0 {{.*}} extract
9 ;CHECK: cost of 1 {{.*}} extract
11 ;CHECK: cost of 1 {{.*}} extract
14 ;CHECK: cost of 0 {{.*}} extract
16 ;CHECK: cost of 1 {{.*}} extract
19 ;CHECK: cost of 1 {{.*}} extract
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/bfin/
bit.d 27 0000001a <extract>:
28 1a: 0a c6 0a 08 R4 = EXTRACT \(R2, R1.L\) \(Z\);
29 1e: 0a c6 10 04 R2 = EXTRACT \(R0, R2.L\) \(Z\);
30 22: 0a c6 23 4e R7 = EXTRACT \(R3, R4.L\) \(X\);
31 26: 0a c6 0e 4a R5 = EXTRACT \(R6, R1.L\) \(X\);
  /external/llvm/test/CodeGen/ARM/
vector-promotion.ll 2 ; RUN: opt -codegenprepare -mtriple=thumbv7-apple-ios %s -o - -mattr=+neon -S -stress-cgp-store-extract | FileCheck --check-prefix=IR-BOTH --check-prefix=IR-STRESS %s
8 ; IR-BOTH-NEXT: [[EXTRACT:%[a-zA-Z_0-9-]+]] = extractelement <2 x i32> [[VECTOR_OR]], i32 1
9 ; IR-BOTH-NEXT: store i32 [[EXTRACT]], i32* %dest
20 %extract = extractelement <2 x i32> %in1, i32 1
21 %out = or i32 %extract, 1
28 ; IR-BOTH-NEXT: [[EXTRACT:%[a-zA-Z_0-9-]+]] = extractelement <2 x i32> [[LOAD]], i32 0
29 ; IR-BOTH-NEXT: [[CMP:%[a-zA-Z_0-9-]+]] = icmp eq i32 [[EXTRACT]], %in2
39 %extract = extractelement <2 x i32> %in1, i32 0
40 %out = icmp eq i32 %extract, %in2
48 ; IR-BOTH-NEXT: [[EXTRACT:%[a-zA-Z_0-9-]+]] = extractelement <2 x i32> [[LOAD]], i32
    [all...]
combine-vmovdrr.ll 20 %shuffle.i.extract.i310 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 0
21 %shuffle.i27.extract.i311 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 1
22 %tmp45 = bitcast i64 %shuffle.i.extract.i310 to <8 x i8>
23 %tmp46 = bitcast i64 %shuffle.i27.extract.i311 to <8 x i8>
36 %shuffle.i.extract.i310 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 %index
37 %shuffle.i27.extract.i311 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 1
38 %tmp45 = bitcast i64 %shuffle.i.extract.i310 to <8 x i8>
39 %tmp46 = bitcast i64 %shuffle.i27.extract.i311 to <8 x i8>
65 %shuffle.i.extract.i310 = extractelement <2 x i64> %shuffle.i.bc.i309, i32 0
66 %shuffle.i27.extract.i311 = extractelement <2 x i64> %shuffle.i.bc.i309, i32
    [all...]
  /external/libavc/encoder/arm/
ih264e_half_pel.s 103 vext.8 d31, d2, d3, #5 @//extract a[5] (column1,row0)
104 vext.8 d30, d3, d4, #5 @//extract a[5] (column2,row0)
107 vext.8 d29, d4, d4, #5 @//extract a[5] (column3,row0)
109 vext.8 d28, d5, d6, #5 @//extract a[5] (column1,row1)
111 vext.8 d27, d6, d7, #5 @//extract a[5] (column2,row1)
113 vext.8 d26, d7, d7, #5 @//extract a[5] (column3,row1)
116 vext.8 d31, d2, d3, #2 @//extract a[2] (column1,row0)
118 vext.8 d30, d3, d4, #2 @//extract a[2] (column2,row0)
120 vext.8 d29, d4, d4, #2 @//extract a[2] (column3,row0)
122 vext.8 d28, d5, d6, #2 @//extract a[2] (column1,row1
    [all...]
  /frameworks/data-binding/compilationTests/src/test/java/android/databinding/compilationTest/
MultiLayoutVerificationTest.java 66 String extract = extract("/app/src/main/res/layout/with_class_name.xml", local
68 assertEquals(extract, "AClassName");
78 String extract = extract("/app/src/main/res/layout-land/with_class_name.xml", local
80 assertEquals("SomeOtherClassName", extract);
133 String extract = extract("/app/src/main/res/" + config + local
135 assertEquals(extract, "<variable name=\"myVariable\" type=\"" + type + "\"/>");
186 String extract = extract("/app/src/main/res/" + config + "/layout_with_import_type.xml" local
225 String extract = extract("\/app\/src\/main\/res\/" + config + "\/foo.xml", location); local
230 String extract = extract("\/app\/src\/main\/res\/" + config + "\/foo.xml", location); local
    [all...]
  /external/libavc/common/armv8/
ih264_inter_pred_filters_luma_horz_av8.s 128 ext v31.8b, v2.8b , v3.8b, #5 ////extract a[5] (column1,row0)
130 ext v30.8b, v3.8b , v4.8b, #5 ////extract a[5] (column2,row0)
132 ext v28.8b, v5.8b , v6.8b, #5 ////extract a[5] (column1,row1)
134 ext v27.8b, v6.8b , v7.8b, #5 ////extract a[5] (column2,row1)
136 ext v31.8b, v2.8b , v3.8b, #2 ////extract a[2] (column1,row0)
138 ext v30.8b, v3.8b , v4.8b, #2 ////extract a[2] (column2,row0)
140 ext v28.8b, v5.8b , v6.8b, #2 ////extract a[2] (column1,row1)
142 ext v27.8b, v6.8b , v7.8b, #2 ////extract a[2] (column2,row1)
144 ext v31.8b, v2.8b , v3.8b, #3 ////extract a[3] (column1,row0)
146 ext v30.8b, v3.8b , v4.8b, #3 ////extract a[3] (column2,row0
    [all...]
  /external/skia/src/core/
SkFilterProc.h 37 // extract low 2 bits
47 // extract low 2 bits and shift up 2
55 // extract low 2 bits
71 // extract low 2 bits
81 // extract low 2 bits and shift up 2
89 // extract low 2 bits
  /system/core/libpixelflinger/
col32cb16blend.S 46 and r10, r1, #0xff // extract red
47 and r12, r9, r1, lsr #8 // extract green
48 and r4, r9, r1, lsr #16 // extract blue
57 mov r6, r8, lsr #11 // extract dest red
58 and r7, r9, r8, lsr #5 // extract dest green
59 and r8, r8, #0x1f // extract dest blue
  /art/runtime/interpreter/mterp/mips/
op_goto_16.S 22 GET_INST_OPCODE(t0) # extract opcode from rINST
32 GET_INST_OPCODE(t0) # extract opcode from rINST
  /external/libcxx/cmake/Modules/
CodeCoverage.cmake 27 message(STATUS "Extract Directories: ${EXTRACT_DIRS}")
31 COMMAND ${CODE_COVERAGE_LCOV} --extract test_coverage.info ${EXTRACT_DIRS} -o test_coverage.info
  /external/llvm/test/CodeGen/Hexagon/
fusedandshift.ll 1 ; RUN: llc -march=hexagon -hexagon-extract=0 < %s | FileCheck %s
3 ; Disable "extract" generation, since it may eliminate the and/lsr.
  /external/llvm/test/CodeGen/X86/
pr21792.ll 12 %index.sroa.0.0.vec.extract = extractelement <4 x i32> %tmp3, i32 0
13 %idx.ext = sext i32 %index.sroa.0.0.vec.extract to i64
16 %index.sroa.0.4.vec.extract = extractelement <4 x i32> %tmp3, i32 1
17 %idx.ext5 = sext i32 %index.sroa.0.4.vec.extract to i64
20 %index.sroa.0.8.vec.extract = extractelement <4 x i32> %tmp3, i32 2
21 %idx.ext14 = sext i32 %index.sroa.0.8.vec.extract to i64
24 %index.sroa.0.12.vec.extract = extractelement <4 x i32> %tmp3, i32 3
25 %idx.ext19 = sext i32 %index.sroa.0.12.vec.extract to i64
  /external/llvm/test/Other/
extract-linkonce.ll 1 ; RUN: llvm-extract -func foo -S < %s | FileCheck %s
2 ; RUN: llvm-extract -delete -func foo -S < %s | FileCheck --check-prefix=DELETE %s
extract-weak-odr.ll 1 ; RUN: llvm-extract -func foo -S < %s | FileCheck %s
2 ; RUN: llvm-extract -delete -func foo -S < %s | FileCheck --check-prefix=DELETE %s
  /external/llvm/tools/llvm-extract/
llvm-extract.cpp 1 //===- llvm-extract.cpp - LLVM function extraction utility ----------------===//
52 // ExtractFuncs - The functions to extract from the module.
54 ExtractFuncs("func", cl::desc("Specify function to extract"),
58 // extract from the module.
60 ExtractRegExpFuncs("rfunc", cl::desc("Specify function(s) to extract using a "
64 // ExtractAlias - The alias to extract from the module.
66 ExtractAliases("alias", cl::desc("Specify alias to extract"),
71 // extract from the module.
73 ExtractRegExpAliases("ralias", cl::desc("Specify alias(es) to extract using a "
77 // ExtractGlobals - The globals to extract from the module
    [all...]
  /art/runtime/interpreter/mterp/arm/
op_const.S 7 GET_INST_OPCODE ip @ extract opcode from rINST
op_const_string.S 12 GET_INST_OPCODE ip @ extract opcode from rINST
op_move_16.S 8 GET_INST_OPCODE ip @ extract opcode from rINST
op_move_result_wide.S 9 GET_INST_OPCODE ip @ extract opcode from rINST
op_new_array.S 18 GET_INST_OPCODE ip @ extract opcode from rINST
  /art/runtime/interpreter/mterp/arm64/
op_array_length.S 10 GET_INST_OPCODE ip // extract opcode from rINST
op_check_cast.S 15 GET_INST_OPCODE ip // extract opcode from rINST
op_cmp_long.S 12 GET_INST_OPCODE ip // extract opcode from wINST

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