| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-sh/arch/ |
| sh4.s | 212 fcmp/eq fr2,fr1 ;!/* 1111nnnnmmmm0100 fcmp/eq <F_REG_M>,<F_REG_N>*/{"fcmp/eq",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_4}, arch_sh2e_up}
213 fcmp/eq dr4,dr2 ;!/* 1111nnn0mmm00100 fcmp/eq <D_REG_M>,<D_REG_N>*/{"fcmp/eq",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_4}, arch_sh2a_or_sh4_up}
214 fcmp/gt fr2,fr1 ;!/* 1111nnnnmmmm0101 fcmp/gt <F_REG_M>,<F_REG_N>*/{"fcmp/gt",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_5}, arch_sh2e_up}
215 fcmp/gt dr4,dr2 ;!/* 1111nnn0mmm00101 fcmp/gt <D_REG_M>,<D_REG_N>*/{"fcmp/gt",{D_REG_M,D_REG_ (…)
[all...] |
| sh4a.s | 215 fcmp/eq fr2,fr1 ;!/* 1111nnnnmmmm0100 fcmp/eq <F_REG_M>,<F_REG_N>*/{"fcmp/eq",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_4}, arch_sh2e_up}
216 fcmp/eq dr4,dr2 ;!/* 1111nnn0mmm00100 fcmp/eq <D_REG_M>,<D_REG_N>*/{"fcmp/eq",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_4}, arch_sh2a_or_sh4_up}
217 fcmp/gt fr2,fr1 ;!/* 1111nnnnmmmm0101 fcmp/gt <F_REG_M>,<F_REG_N>*/{"fcmp/gt",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_5}, arch_sh2e_up}
218 fcmp/gt dr4,dr2 ;!/* 1111nnn0mmm00101 fcmp/gt <D_REG_M>,<D_REG_N>*/{"fcmp/gt",{D_REG_M,D_REG_ (…)
[all...] |
| /toolchain/binutils/binutils-2.25/opcodes/ |
| ia64-waw.tbl | 17 AR[FPSR].sf0.flags; IC:fp-arith-s0, IC:fcmp-s0, IC:fpcmp-s0; IC:fp-arith-s0, IC:fcmp-s0, IC:fpcmp-s0; none
18 AR[FPSR].sf0.flags; fclrf.s0, IC:fcmp-s0, IC:fp-arith-s0, IC:fpcmp-s0, IC:mov-to-AR-FPSR; fclrf.s0, IC:mov-to-AR-FPSR; impliedF
19 AR[FPSR].sf1.flags; IC:fp-arith-s1, IC:fcmp-s1, IC:fpcmp-s1; IC:fp-arith-s1, IC:fcmp-s1, IC:fpcmp-s1; none
20 AR[FPSR].sf1.flags; fclrf.s1, IC:fcmp-s1, IC:fp-arith-s1, IC:fpcmp-s1, IC:mov-to-AR-FPSR; fclrf.s1, IC:mov-to-AR-FPSR; impliedF
21 AR[FPSR].sf2.flags; IC:fp-arith-s2, IC:fcmp-s2, IC:fpcmp-s2; IC:fp-arith-s2, IC:fcmp-s2, IC:fpcmp-s2; none
22 AR[FPSR].sf2.flags; fclrf.s2, IC:fcmp-s2, IC:fp-arith-s2, IC:fpcmp-s2, IC:mov-to-AR-FPSR; fclrf.s2, IC:mov-to-AR-FPSR; impliedF
23 AR[FPSR].sf3.flags; IC:fp-arith-s3, IC:fcmp-s3, IC:fpcmp-s3; IC:fp-arith-s3, IC:fcmp-s3, IC:fpcmp-s3; non
[all...] |
| /external/llvm/test/Analysis/DependenceAnalysis/ |
| Invariant.ll | 27 %cmp7 = fcmp ogt float %add, %g
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-indexed-vector-ldst-2.ll | 20 %cmp168 = fcmp olt double %6, undef
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| llvm.AMDGPU.kill.ll | 26 %tmp0 = fcmp olt float %13, 0.0
|
| vselect.ll | 35 %cmp = fcmp une <2 x float> %0, %1
75 %cmp = fcmp une <4 x float> %0, %1
|
| /external/llvm/test/CodeGen/ARM/ |
| cse-libcalls.ll | 14 %tmp6.i = fcmp olt double %tmp19.i.i, 1.000000e+00 ; <i1> [#uses=1]
|
| fast-isel-cmp-imm.ll | 9 %cmp = fcmp oeq float %a, 0.000000e+00
29 %cmp = fcmp oeq float %a, -0.000000e+00
48 %cmp = fcmp oeq double %a, 0.000000e+00
66 %cmp = fcmp oeq double %a, -0.000000e+00
|
| debug-info-sreg2.ll | 20 %cmp7 = fcmp olt float %call, %call16, !dbg !12
28 %cmp = fcmp olt float %inc, %call1, !dbg !12
|
| fnegs.ll | 27 %3 = fcmp olt double %2, 1.234000e+00 ; <i1> [#uses=1]
54 %3 = fcmp olt double %2, 1.234000e+00 ; <i1> [#uses=1]
|
| /external/llvm/test/CodeGen/Mips/msa/ |
| llvm-stress-s2090927243-simplified.ll | 22 %Cmp32 = fcmp ueq float undef, 0x3CDA6E5E40000000
|
| /external/llvm/test/CodeGen/PowerPC/ |
| 2009-11-25-ImpDefBug.ll | 20 %0 = fcmp olt float undef, 0.000000e+00 ; <i1> [#uses=2]
|
| fast-isel-cmp-imm.ll | 9 %cmp = fcmp oeq float %a, 0.000000e+00
28 %cmp = fcmp oeq float %a, -0.000000e+00
45 %cmp = fcmp oeq double %a, 0.000000e+00
62 %cmp = fcmp oeq double %a, -0.000000e+00
|
| xvcmpeqdp-v2f64.ll | 11 %cmp24.i.i = fcmp ord <3 x double> undef, zeroinitializer
|
| /external/llvm/test/CodeGen/X86/ |
| 2009-03-12-CPAlignBug.ll | 28 %9 = fcmp olt x86_fp80 %.reload6, 0xK00000000000000000000 ; <i1> [#uses=1]
|
| fabs.ll | 28 %Y = fcmp oge double %X, -0.0
|
| /external/llvm/test/DebugInfo/ARM/ |
| selectiondag-deadcode.ll | 5 br i1 fcmp oeq (float fadd (float fadd (float fmul (float undef, float undef), float fmul (float undef, float undef)), float fmul (float undef, float undef)), float 0.000000e+00), label %_ZN7Vector39NormalizeEv.exit, label %1
|
| /external/llvm/test/Transforms/GVN/ |
| assume-equal.ll | 124 ; This tests checks const propatation with fcmp instruction.
136 %cmp = fcmp oeq float %1, %0 ; note const on lhs
151 %cmp = fcmp nnan ueq float %0, 3.000000e+00
165 %cmp = fcmp ueq float %0, 3.000000e+00 ; no nnan flag - can't propagate
|
| /external/llvm/test/Transforms/LoopSimplify/ |
| merge-exits.ll | 37 %t10 = fcmp uge float %distERBhi.0, 2.500000e+00
|
| /external/llvm/test/Transforms/SLPVectorizer/X86/ |
| phi3.ll | 24 %cmp = fcmp ogt double %div.i, %div.i16
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/hppa/reloc/ |
| reduce2.s | 67 fcmp,dbl,= %fr4,%fr8
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mmix/ |
| comment-1.s | 8 FCMP $3,$2,$1 comments; x y z
|
| /external/llvm/lib/Transforms/Scalar/ |
| PartiallyInlineLibCalls.cpp | 150 Value *FCmp = Builder.CreateFCmpOEQ(Call, Call);
151 Builder.CreateCondBr(FCmp, JoinBB, LibCallBB);
|
| /external/llvm/test/Bitcode/ |
| compatibility.ll | [all...] |
