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  /external/llvm/test/CodeGen/X86/
break-false-dep.ll 38 ; SSE: movsd ([[A0]]), %xmm0
193 ;SSE-NEXT: movsd [[XMM0]],
fast-isel-x86-64.ll 197 ; CHECK: movsd LCP{{.*}}_{{.*}}(%rip), %xmm0
267 ; CHECK: movsd LCPI
fp128-cast.ll 34 ; CHECK: movsd vf64(%rip), %xmm0
118 ; CHECK-NEXT: movsd %xmm0, vf64(%rip)
x86-shifts.ll 126 ; CHECK-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
127 ; CHECK-NEXT: movsd {{.*#+}} xmm1 = xmm2[0],xmm1[1]
vector-shift-ashr-128.ll 24 ; SSE2-NEXT: movsd {{.*#+}} xmm4 = xmm2[0],xmm4[1]
28 ; SSE2-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1]
88 ; X32-SSE-NEXT: movsd {{.*#+}} xmm4 = xmm3[0],xmm4[1]
92 ; X32-SSE-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
112 ; SSE2-NEXT: movsd {{.*#+}} xmm3 = xmm4[0],xmm3[1]
121 ; SSE2-NEXT: movsd {{.*#+}} xmm5 = xmm0[0],xmm5[1]
190 ; X32-SSE-NEXT: movsd {{.*#+}} xmm3 = xmm4[0],xmm3[1]
199 ; X32-SSE-NEXT: movsd {{.*#+}} xmm5 = xmm0[0],xmm5[1]
    [all...]
fast-isel-nontemporal.ll 49 ; SSE2-NEXT: movsd %xmm0, (%rdi)
fdiv-combine.ll 87 ; CHECK-NEXT: movsd{{.*#+}} xmm2 = mem[0],zero
fp-load-trunc.ll 9 ; CHECK-NEXT: movsd (%eax), %xmm0
vector-rotate-128.ll 26 ; SSE2-NEXT: movsd {{.*#+}} xmm4 = xmm3[0],xmm4[1]
31 ; SSE2-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
93 ; X32-SSE-NEXT: movsd {{.*#+}} xmm4 = xmm3[0],xmm4[1]
99 ; X32-SSE-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
133 ; SSE2-NEXT: movsd {{.*#+}} xmm4 = xmm5[0],xmm4[1]
142 ; SSE2-NEXT: movsd {{.*#+}} xmm6 = xmm0[0],xmm6[1]
235 ; X32-SSE-NEXT: movsd {{.*#+}} xmm4 = xmm5[0],xmm4[1]
244 ; X32-SSE-NEXT: movsd {{.*#+}} xmm6 = xmm0[0],xmm6[1]
737 ; SSE2-NEXT: movsd {{.*#+}} xmm2 = xmm1[0],xmm2[1]
741 ; SSE2-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1
    [all...]
vshift-4.ll 25 ; CHECK-NEXT: movsd {{.*#+}} xmm3 = xmm0[0],xmm3[1]
atomic_mi.ll 863 ; X64-NEXT: movsd %[[XMM]], (%[[M]])
898 ; X64: movsd .{{[A-Z0-9_]+}}(%rip), %[[XMM:xmm[0-9]+]]
900 ; X64-NEXT: movsd %[[XMM]], glob64(%rip)
933 ; X64: movsd .{{[A-Z0-9_]+}}(%rip), %[[XMM:xmm[0-9]+]]
935 ; X64-NEXT: movsd %[[XMM]], (%r[[M]])
968 ; X64: movsd .{{[A-Z0-9_]+}}(%rip), %[[XMM:xmm[0-9]+]]
970 ; X64-NEXT: movsd %[[XMM]], [[STACKOFF]](%rsp)
  /external/v8/src/x64/
deoptimizer-x64.cc 124 __ Movsd(Operand(rsp, offset), xmm_reg);
264 __ Movsd(xmm_reg, Operand(rbx, src_offset));
  /external/llvm/test/MC/Disassembler/X86/
intel-syntax.txt 9 # CHECK: movsd
  /external/v8/test/cctest/
test-code-stubs-x64.cc 91 __ Movsd(MemOperand(rsp, 0), xmm0);
  /prebuilts/go/darwin-x86/pkg/bootstrap/src/bootstrap/internal/obj/x86/
anames.go 530 "MOVSD",
  /prebuilts/go/darwin-x86/src/cmd/internal/obj/x86/
anames.go 527 "MOVSD",
  /prebuilts/go/linux-x86/pkg/bootstrap/src/bootstrap/internal/obj/x86/
anames.go 530 "MOVSD",
  /prebuilts/go/linux-x86/src/cmd/internal/obj/x86/
anames.go 527 "MOVSD",
  /toolchain/binutils/binutils-2.25/gas/testsuite/gas/i386/
opts-intel.d 141 [ ]*[a-f0-9]+: f2 0f 10 f4 movsd xmm6,xmm4
142 [ ]*[a-f0-9]+: f2 0f 11 e6 movsd.s xmm6,xmm4
245 [ ]*[a-f0-9]+: f2 0f 10 f4 movsd xmm6,xmm4
246 [ ]*[a-f0-9]+: f2 0f 11 e6 movsd.s xmm6,xmm4
simd-intel.d 61 [ ]*[a-f0-9]+: f2 0f 10 00 movsd xmm0,QWORD PTR \[eax\]
62 [ ]*[a-f0-9]+: f2 0f 11 00 movsd QWORD PTR \[eax\],xmm0
154 [ ]*[a-f0-9]+: f2 0f 10 00 movsd xmm0,QWORD PTR \[eax\]
155 [ ]*[a-f0-9]+: f2 0f 11 00 movsd QWORD PTR \[eax\],xmm0
simd-suffix.d 61 [ ]*[a-f0-9]+: f2 0f 10 00 movsd \(%eax\),%xmm0
62 [ ]*[a-f0-9]+: f2 0f 11 00 movsd %xmm0,\(%eax\)
154 [ ]*[a-f0-9]+: f2 0f 10 00 movsd \(%eax\),%xmm0
155 [ ]*[a-f0-9]+: f2 0f 11 00 movsd %xmm0,\(%eax\)
simd.d 60 [ ]*[a-f0-9]+: f2 0f 10 00 movsd \(%eax\),%xmm0
61 [ ]*[a-f0-9]+: f2 0f 11 00 movsd %xmm0,\(%eax\)
153 [ ]*[a-f0-9]+: f2 0f 10 00 movsd \(%eax\),%xmm0
154 [ ]*[a-f0-9]+: f2 0f 11 00 movsd %xmm0,\(%eax\)
  /external/valgrind/memcheck/tests/amd64/
sse_memory.stdout.exp     [all...]
  /external/valgrind/memcheck/tests/x86/
sse2_memory.stdout.exp     [all...]
  /external/v8/src/crankshaft/ia32/
lithium-codegen-ia32.cc 96 __ movsd(MemOperand(esp, count * kDoubleSize),
112 __ movsd(XMMRegister::from_code(save_iterator.Current()),
    [all...]

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