| /external/llvm/test/CodeGen/PowerPC/ |
| vec-abi-align.ll | 39 ; CHECK-DAG: li [[REG16:[0-9]+]], 16
41 ; CHECK-DAG: lvx 2, [[REGB]], [[REG16]]
46 ; CHECK-VSX-DAG: li [[REG16:[0-9]+]], 16
48 ; CHECK-VSX-DAG: lxvw4x {{[0-9]+}}, [[REGB]], [[REG16]]
65 ; CHECK-DAG: li [[REG16:[0-9]+]], 16
67 ; CHECK-DAG: lvx 2, [[REGB]], [[REG16]]
72 ; CHECK-VSX-DAG: li [[REG16:[0-9]+]], 16
74 ; CHECK-VSX-DAG: lxvw4x {{[0-9]+}}, [[REGB]], [[REG16]]
|
| /toolchain/binutils/binutils-2.25/opcodes/ |
| i386-reg.tbl | 49 ax, Reg16|Acc|Word, 0, 0, Dw2Inval, Dw2Inval
50 cx, Reg16, 0, 1, Dw2Inval, Dw2Inval
51 dx, Reg16|InOutPortReg, 0, 2, Dw2Inval, Dw2Inval
52 bx, Reg16|BaseIndex, 0, 3, Dw2Inval, Dw2Inval
53 sp, Reg16, 0, 4, Dw2Inval, Dw2Inval
54 bp, Reg16|BaseIndex, 0, 5, Dw2Inval, Dw2Inval
55 si, Reg16|BaseIndex, 0, 6, Dw2Inval, Dw2Inval
56 di, Reg16|BaseIndex, 0, 7, Dw2Inval, Dw2Inval
57 r8w, Reg16, RegRex, 0, Dw2Inval, Dw2Inval
58 r9w, Reg16, RegRex, 1, Dw2Inval, Dw2Inva
[all...] |
| i386-opc.tbl | 26 mov, 2, 0x88, None, 1, 0, D|W|CheckRegSize|Modrm|No_sSuf|No_ldSuf|HLEPrefixOk=3, { Reg8|Reg16|Reg32|Reg64, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
29 mov, 2, 0xb0, None, 1, 0, W|CheckRegSize|ShortForm|No_sSuf|No_qSuf|No_ldSuf, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32 }
30 mov, 2, 0xc6, 0x0, 1, 0, W|CheckRegSize|Modrm|No_sSuf|No_ldSuf|HLEPrefixOk=3, { Imm8|Imm16|Imm32|Imm32S, Reg8|Reg16|Reg32|Reg64|Byte|Word|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
37 mov, 2, 0x8c, None, 1, 0, Modrm|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { SReg2, Reg16|Reg32|Reg64|RegMem }
39 mov, 2, 0x8c, None, 1, Cpu386, Modrm|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { SReg3, Reg16|Reg32|Reg64|RegMem }
41 mov, 2, 0x8e, None, 1, 0, Modrm|IgnoreSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg16|Reg32|Reg64, SReg2 }
43 mov, 2, 0x8e, None, 1, Cpu386, Modrm|IgnoreSize|No_bSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg16|Reg32|Reg64, SReg3 }
56 movbe, 2, 0x0f38f0, None, 3, CpuMovbe, Modrm|No_bSuf|No_sSuf|No_ldSuf, { Word|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg16|Reg32|Reg64 }
57 movbe, 2, 0x0f38f1, None, 3, CpuMovbe, Modrm|No_bSuf|No_sSuf|No_ldSuf, { Reg16|Reg32|Reg64, Word|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S
[all...] |
| i386-gen.c | 257 "Reg16" },
329 "Reg16|InOutPortReg" },
525 BITFIELD (Reg16),
[all...] |
| i386-opc.h | 617 Reg16,
747 unsigned int reg16:1; member in struct:i386_operand_type::__anon75945
|
| /development/ndk/platforms/android-9/arch-mips/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /external/llvm/test/CodeGen/X86/ |
| 2014-08-29-CompactUnwind.ll | 36 %reg16 = getelementptr inbounds [3 x i8], [3 x i8]* %.str..str1.i, i64 0, i64 0
39 call void (i64*, i8*, ...) @append(i64* %str.i, i8* getelementptr inbounds ([6 x i8], [6 x i8]* @.str2, i64 0, i64 0), i8* %reg16, i8* %reg19)
|
| /prebuilts/ndk/current/platforms/android-12/arch-mips/usr/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/current/platforms/android-13/arch-mips/usr/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/current/platforms/android-14/arch-mips/usr/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/current/platforms/android-15/arch-mips/usr/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/current/platforms/android-16/arch-mips/usr/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/current/platforms/android-17/arch-mips/usr/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/current/platforms/android-18/arch-mips/usr/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/current/platforms/android-19/arch-mips/usr/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /prebuilts/ndk/current/platforms/android-9/arch-mips/usr/include/asm/ |
| processor.h | 60 unsigned long reg16; member in struct:thread_struct
79 #define INIT_THREAD { .reg16 = 0, .reg17 = 0, .reg18 = 0, .reg19 = 0, .reg20 = 0, .reg21 = 0, .reg22 = 0, .reg23 = 0, .reg29 = 0, .reg30 = 0, .reg31 = 0, .cp0_status = 0, .fpu = { .fpr = {0,}, .fcr31 = 0, }, FPAFF_INIT .dsp = { .dspr = {0, }, .dspcontrol = 0, }, .cp0_badvaddr = 0, .cp0_baduaddr = 0, .error_code = 0, .trap_no = 0, .irix_trampoline = 0, .irix_oldctx = 0, }
|
| /toolchain/binutils/binutils-2.25/gas/config/ |
| tc-i386-intel.c | 437 || intel_state.index->reg_type.bitfield.reg16)
965 && intel_state.base->reg_type.bitfield.reg16
966 && intel_state.index->reg_type.bitfield.reg16
|
| tc-i386.c | [all...] |
| tc-h8300.c | 788 as_bad (_("expected @(exp, reg16)"));
796 as_bad (_("expected @(exp, reg16)"));
825 as_bad (_("expected @(exp, reg16)"));
[all...] |
| /external/elfutils/tests/ |
| run-addrcfi.sh | 49 x87 reg16 (%st5): undefined
96 x87 reg16 (%st5): undefined
130 return address in reg16
148 integer reg16 (%rip): location expression: call_frame_cfa plus_uconst(-8)
196 return address in reg16
214 integer reg16 (%rip): location expression: call_frame_cfa plus_uconst(-8)
318 integer reg16 (r16): same_value
[all...] |
| /external/libunwind_llvm/src/ |
| dwarf2.h | 172 DW_OP_reg16 = 0x60, // Contents of reg16
|
| /external/llvm/include/llvm/Support/ |
| Dwarf.def | 212 HANDLE_DW_OP(0x60, reg16)
|
| /ndk/sources/cxx-stl/llvm-libc++abi/libcxxabi/src/Unwind/ |
| dwarf2.h | 172 DW_OP_reg16 = 0x60, // Contents of reg16
|
| /external/elfutils/libdw/ |
| known-dwarf.h | 506 DWARF_ONE_KNOWN_DW_OP (reg16, DW_OP_reg16) \
[all...] |
| /external/elfutils/libcpu/defs/ |
| i386 | 13 %mask {reg16} 3
95 `01100011,{mod}{reg16}{r_m}:arpl {reg16},{mod}{r_m}
[all...] |
