/external/llvm/lib/IR/ |
Constants.cpp | 363 case Instruction::SRem: [all...] |
/external/llvm/lib/Transforms/Vectorize/ |
SLPVectorizer.cpp | [all...] |
/external/clang/test/OpenMP/ |
for_simd_codegen.cpp | 405 // CHECK-NEXT: [[J_1:%.+]] = srem i64 [[IV2]], 4 [all...] |
parallel_for_simd_codegen.cpp | [all...] |
simd_codegen.cpp | 274 // CHECK-NEXT: [[J_1:%.+]] = srem i64 [[IV2]], 4
|
/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 195 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
DAGCombiner.cpp | [all...] |
LegalizeVectorOps.cpp | 266 case ISD::SREM: [all...] |
SelectionDAGBuilder.h | 782 void visitSRem(const User &I) { visitBinary(I, ISD::SREM); } [all...] |
FastISel.cpp | [all...] |
SelectionDAG.cpp | [all...] |
LegalizeIntegerTypes.cpp | 122 case ISD::SREM: Res = PromoteIntRes_SExtIntBinOp(N); break; [all...] |
LegalizeVectorTypes.cpp | 125 case ISD::SREM: 685 case ISD::SREM: [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64FastISel.cpp | [all...] |
/external/llvm/lib/Target/Mips/ |
Mips32r6InstrInfo.td | 435 class MOD_DESC : DIVMOD_DESC_BASE<"mod", GPR32Opnd, srem>; [all...] |
MipsMSAInstrInfo.td | [all...] |
/external/llvm/test/CodeGen/PowerPC/ |
ppc-shrink-wrapping.ll | 684 %rem.i = srem i64 %cond.i, 1050011
|
/external/llvm/lib/Analysis/ |
ScalarEvolutionExpander.cpp | 257 Remainder, SE.getConstant(C->getAPInt().srem(FC->getAPInt()))); 270 if (!C->getAPInt().srem(FC->getAPInt())) { [all...] |
/external/llvm/lib/CodeGen/AsmPrinter/ |
AsmPrinter.cpp | [all...] |
/external/llvm/test/Bitcode/ |
compatibility.ll | [all...] |
/external/llvm/docs/ |
LangRef.rst | [all...] |
/external/llvm/lib/Target/ |
README.txt | [all...] |
/external/llvm/bindings/ocaml/llvm/ |
llvm.ml | 170 | SRem [all...] |
/external/llvm/lib/Target/NVPTX/ |
NVPTXVector.td | 443 defm VSRem : IntBinVOp<"rem.s", srem, SREMi64rr, SREMi32rr, SREMi16rr, [all...] |
/external/llvm/lib/Target/X86/ |
X86TargetTransformInfo.cpp | [all...] |