| /external/llvm/test/CodeGen/ARM/ |
| divmod-eabi.ll | 3 ; Both "none-eabi" and "androideabi" must lower SREM/UREM to __aeabi_{u,i}divmod
18 %rem = srem i32 %conv, %conv1
30 %rem8 = srem i32 %conv1, %conv
52 %rem = srem i32 %a, %b
64 %rem1 = srem i32 %b, %a
104 ; FIXME: AEABI is not lowering long u/srem into u/ldivmod
111 %rem = srem i64 %a, %b
134 %rem = srem i32 %a, %b
155 %rem = srem i32 %a, %b
168 %rem = srem i32 %a, %
[all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| int-div-01.ll | 26 %rem = srem i32 %a, %b
42 %rem = srem i32 %a, %b
57 %rem = srem i32 %a, %b
74 %rem = srem i32 %a, %b
100 %rem = srem i32 %a, %b
117 %rem = srem i32 %a, %b
129 %rem = srem i32 %a, %b
142 %rem = srem i32 %a, %b
153 %rem = srem i32 %a, %b
164 %rem = srem i32 %a, %
[all...] |
| int-div-03.ll | 29 %rem = srem i64 %a, %bext
43 %rem = srem i64 %a, %bext
66 %rem = srem i64 %a, %bext
94 %rem = srem i64 %a, %bext
110 %rem = srem i64 %a, %bext
123 %rem = srem i64 %a, %bext
137 %rem = srem i64 %a, %bext
149 %rem = srem i64 %a, %bext
161 %rem = srem i64 %a, %bext
175 %rem = srem i64 %a, %bex
[all...] |
| int-div-04.ll | 26 %rem = srem i64 %a, %b
40 %rem = srem i64 %a, %b
66 %rem = srem i64 %a, %b
81 %rem = srem i64 %a, %b
93 %rem = srem i64 %a, %b
106 %rem = srem i64 %a, %b
117 %rem = srem i64 %a, %b
128 %rem = srem i64 %a, %b
141 %rem = srem i64 %a, %b
154 %rem = srem i64 %a, %
[all...] |
| /external/llvm/test/Analysis/ValueTracking/ |
| pr23011.ll | 8 %rem = srem i8 %x, 15
|
| /external/llvm/test/CodeGen/Mips/ |
| div_rem.ll | 14 %rem = srem i32 %0, %1
|
| rem.ll | 12 %rem = srem i32 %0, %1
|
| /external/llvm/test/CodeGen/X86/ |
| allrem-moddi3.ll | 13 %div = srem i64 84, %conv4
|
| atom-bypass-slow-division.ll | 25 %result = srem i32 %a, %b
41 %resultrem = srem i32 %a, %b
81 %resultrem = srem i32 %a, 33
91 %resultrem = srem i32 %a, 33
|
| divrem8_ext.ll | 60 %1 = srem i8 %x, %y
70 %1 = srem i8 %x, %y
81 %1 = srem i8 %x, %y
95 %1 = srem i8 %x, %y
|
| split-vector-rem.ll | 5 %m = srem <8 x i32> %t, %u
|
| vector-rem.ll | 5 %m = srem <4 x i32> %t, %u
|
| atom-bypass-slow-division-64.ll | 31 %result = srem i64 %a, %b
48 %resultrem = srem i64 %a, %b
|
| fast-isel-divrem.ll | 16 %result = srem i8 %dividend, %divisor
56 %result = srem i16 %dividend, %divisor
96 %result = srem i32 %dividend, %divisor
|
| /external/llvm/test/ExecutionEngine/MCJIT/ |
| test-arith.ll | 8 %E = srem i8 %D, %D ; <i8> [#uses=0]
15 %E.upgrd.5 = srem i16 %D.upgrd.4, %D.upgrd.4 ; <i16> [#uses=0]
22 %E.upgrd.12 = srem i32 %D.upgrd.11, %D.upgrd.11 ; <i32> [#uses=0]
29 %E.upgrd.18 = srem i64 %D.upgrd.17, %D.upgrd.17 ; <i64> [#uses=0]
|
| /external/llvm/test/ExecutionEngine/OrcMCJIT/ |
| test-arith.ll | 8 %E = srem i8 %D, %D ; <i8> [#uses=0]
15 %E.upgrd.5 = srem i16 %D.upgrd.4, %D.upgrd.4 ; <i16> [#uses=0]
22 %E.upgrd.12 = srem i32 %D.upgrd.11, %D.upgrd.11 ; <i32> [#uses=0]
29 %E.upgrd.18 = srem i64 %D.upgrd.17, %D.upgrd.17 ; <i64> [#uses=0]
|
| /external/llvm/test/ExecutionEngine/ |
| test-interp-vec-arithm_int.ll | 8 %E_i8 = srem <5 x i8> %D_i8, %D_i8
16 %E_i16 = srem <4 x i16> %D_i16, %D_i16
24 %E_i32 = srem <3 x i32> %D_i32, %D_i32
32 %E_i64 = srem <2 x i64> %D_i64, %D_i64
|
| /external/llvm/test/Transforms/ConstProp/ |
| 2009-06-20-constexpr-zero-lhs.ll | 6 @test3 = constant i32 srem (i32 0, i32 ptrtoint (i32* @G to i32))
|
| /external/llvm/test/Transforms/InstCombine/ |
| srem1.ll | 11 %rem = srem i64 %or, 1 ; <i64> [#uses=1]
|
| rem.ll | 9 %B = srem i32 %A, 1 ; ISA constant 0
16 %B = srem i32 0, %A
33 %B = srem i32 %A, -8
63 %B = srem i32 %A, 0 ;; undef
71 %C = srem i32 %B, 4
79 %C = srem i32 %B, 8
115 %tmp.5 = srem i32 %tmp.1, 2
122 %x = srem i32 %i, %i
|
| /external/llvm/test/CodeGen/AArch64/ |
| arm64-fast-isel-rem.ll | 17 %1 = srem i32 %a, %b
25 %1 = srem i64 %a, %b
|
| analyzecmp.ll | 15 %rem = srem i64 %add, 64
|
| /external/llvm/test/CodeGen/Generic/ |
| BasicInstrs.ll | 31 define i32 @srem(i32 %A, i32 %B) {
32 %R = srem i32 %A, %B ; <i32> [#uses=1]
|
| /external/llvm/test/CodeGen/Mips/llvm-ir/ |
| srem.ll | 46 %r = srem i1 %a, %b
69 %r = srem i8 %a, %b
92 %r = srem i16 %a, %b
107 %r = srem i32 %a, %b
124 %r = srem i64 %a, %b
137 %r = srem i128 %a, %b
|
| /external/llvm/test/CodeGen/NVPTX/ |
| bypass-div.ll | 31 %d = srem i64 %a, %b
68 %d = srem i32 %a, %b
|
